ST62T40B datasheet(61/76 Pages) STMICROELECTRONICS

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ST62T40B/E40B

6 ELECTRICAL CHARACTERISTICS

6.1 ABSOLUTE MAXIMUM RATINGS

This product contains devices to protect the inputs

against damage due to high static voltages, how-

ever it is advisable to take normal precaution to

avoid application of any voltage higher than the

specified maximum rated voltages.

For proper operation it is recommended that VI

and VO be higher than VSS and lower than VDD.

Reliability is enhanced if unused inputs are con-

nected to an appropriate logic voltage level (VDD

or VSS).

Power Considerations.The average chip-junc-

tion temperature, Tj, in Celsius can be obtained

from:

Tj=

TA + PD x RthJA

Where: TA =

Ambient Temperature.

RthJA = Package thermal resistance

(junction-to ambient).

PD =

Pint + Pport.

Pint =

IDD x VDD (chip internal power).

Pport = Port power dissipation (deter-

mined by the user).

Notes:

Stresses above those listed as "absolute maximum ratings" may cause permanent damage to the device. This is a stress rating only and

functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may

affect device reliability.

- (1) Within these limits, clamping diodes are guarantee to be not conductive. Voltages outside these limits are authorised as long as injection

current is kept within the specification.

Symbol

Parameter

Value

Unit

VDD

Supply Voltage

-0.3 to 7.0

Input Voltage

VSS - 0.3 to VDD + 0.3

(1)

Output Voltage

VSS - 0.3 to VDD + 0.3

(1)

Current Drain per Pin Excluding VDD, VSS

±10

IVDD

Total Current into VDD (source)

IVSS

Total Current out of VSS (sink)

Junction Temperature

150

°C

TSTG

Storage Temperature

-60 to 150

°C

633

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