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AD9684 Scheda tecnica(PDF) 46 Page - Analog Devices

Il numero della parte AD9684
Spiegazioni elettronici  Dual Analog-to-Digital Converter
PDF  65 Pages
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

AD9684 Scheda tecnica(HTML) 46 Page - Analog Devices

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Data Sheet
AD9684
Chip
Application
Layer
Chip
Decimation
Ratio
DDC Input
Type
DDC
Output
Type
Bandwidth
Per DDC1
Number of Virtual
Converters
Required (M)
Register Settings2
Register 0x314, Register 0x315,
Register 0x320, Register 0x321 = FTW
and POW set as required by application
for DDC 0
Register 0x334, Register 0x335,
Register 0x340, Register 0x341 = FTW
and POW set as required by application
for DDC 1
Four DDCs
8
Real
Complex
19.25% × fS
8
Register 0x200 = 0x03 (four DDCs, I/Q
selected)
Register 0x201 = 0x03 (chip decimate
by 8)
Register 0x310, Register 0x330,
Register 0x350, Register 0x370 = 0x41
(real mixer, 6 dB gain, variable IF,
complex output, HB3 + HB2 + HB1
filters)
Register 0x311 = 0x00 (DDC 0 I input =
ADC Channel A, DDC 0 Q input = ADC
Channel A)
Register 0x331 = 0x00 (DDC 1 I input =
ADC Channel A, DDC 1 Q input = ADC
Channel A)
Register 0x351 = 0x05 (DDC 2 I input =
ADC Channel B, DDC 2 Q input = ADC
Channel B)
Register 0x371 = 0x05 (DDC 3 I input =
ADC Channel B, DDC 3 Q input = ADC
Channel B)
Register 0x314, Register 0x315,
Register 0x320, Register 0x321 = FTW
and POW set as required by application
for DDC 0
Register 0x334, Register 0x335,
Register 0x340, Register 0x341 = FTW
and POW set as required by application
for DDC 1
Register 0x354, Register 0x355,
Register 0x360, Register 0x361 = FTW
and POW set as required by application
for DDC 2
Register 0x374, Register 0x375,
Register 0x380, Register 0x381 = FTW
and POW set as required by application
for DDC 3
Four DDCs
16
Real
Complex
9.625% × fS
8
Register 0x200 = 0x03 (four DDCs, I/Q
selected)
Register 0x201 = 0x04 (chip decimate
by 16)
Register 0x310, Register 0x330,
Register 0x350, Register 0x370 = 0x42
(real mixer, 6 dB gain, variable IF,
complex output, HB4 + HB3 + HB2 +
HB1 filters)
Register 0x311 = 0x00 (DDC 0 I input =
ADC Channel A, DDC 0 Q input = ADC
Channel A)
Register 0x331 = 0x00 (DDC 1 I input =
ADC Channel A, DDC 1 Q input = ADC
Channel A)
Rev. 0 | Page 45 of 64



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