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EM78P870 Scheda tecnica(PDF) 8 Page - ELAN Microelectronics Corp |
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EM78P870 Scheda tecnica(HTML) 8 Page - ELAN Microelectronics Corp |
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8 / 48 page ![]() EM78P870 8-bit OTP Micro-controller _________________________________________________________________________________________________________________________________________________________________ * This specification is subject to be changed without notice. 5 8/19/2004 (V1.5) VI.Pin Descriptions PIN I/O DESCRIPTION POWER VDD AVDD POWER Digital power Analog power GND AVSS POWER Digital ground Analog ground CLOCK XIN I Input pin for 32.768kHz oscillator XOUT O Output pin for 32.768kHz oscillator PLLC I Phase loop lock. Connect a capacitor 0.01u to 0.047u with GND. LCD COM0..COM15 COM16..COM23 O O (SEG0..SEG7) Common driver pins of LCD drivers COM16 to COM23 are shared with SEG0 to SEG7 SEG0..SEG7 SEG8...SEG47 SEG48..SEG55 SEG56..SEG63 SEG64..SEG71 SEG72..SEG79 O (COM16..COM23) O O (I/O : PORTB) O (I/O : PORTC) O (I/O : PORT8) O (I/O : PORT9) Segment driver pins of LCD drivers SEG0 to SEG7 are shared with COM16 to COM23 SEG48 to SEG79 are shared with IO PORT VC1..VC5 I Reference voltage input. Each one connect a capacitor (0.1u) with GND. TONE, KTONE TONE O Programming tone output pin KTONE O (PORT67) Key tone output. Shared with PORT67 SERIAL IO SCK IO (PORT60) Master : output pin, Slave : input pin. This pin is shared with PORT60. SDO O (PORT61) Output pin for serial data transferring. This pin is shared with PORT61. SDI I (PORT62) Input pin for receiving data. This pin shared with PORT62. COMPARATOR CMP1 CMP2 CMP3 I (PORT63) I (PORT64) I (PORT65) Comparator input pins. Shared with PORT63, PORT64 and PORT65. IO P55 ~P57 I/O PORT 5 can be INPUT or OUTPUT port each bit. P60 ~P67 I/O PORT 6 can be INPUT or OUTPUT port each bit. Internal pull high. P70 ~ P77 I/O PORT 7 can be INPUT or OUTPUT port each bit. Internal Pull high function. Auto key scan function. Interrupt function. P80 ~ P87 I/O PORT 8 can be INPUT or OUTPUT port each bit. Shared with LCD Segment signal. P90 ~ P97 I/O PORT 9 can be INPUT or OUTPUT port each bit. Shared with LCD Segment signal. PB0 ~ PB7 I/O PORT B can be INPUT or OUTPUT port each bit. Shared with LCD Segment signal. PC0 ~ PC7 I/O PORT C can be INPUT or OUTPUT port each bit. Shared with LCD Segment signal. INT0 PORT70..73 Interrupt source which has the same interrupt flag. Any pin from PORT70 to PORT73 has a falling edge signal, it will generate a interruption. INT1 PORT74..76 Interrupt source which has the same interrupt flag. Any pin from PORT74 to PORT76 has a falling edge signal, it will generate a interruption. |
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