ADL5335ACPZN-R7 datasheet(5/16 Pages) AD

5 / 16 page

Data Sheet

ADL5335

Rev. 0 | Page 5 of 16

Parameter

Test Conditions/Comments

Min

Typ

Max

Unit

Return Loss

Input

−19

Output

Minimum gain

−17

Maximum gain

−11

CMRR

vs. frequency (±200 MHz)

FREQUENCY = 4.2 GHz

Gain Range

Maximum Gain

9.3

Minimum Gain

−10.7

Gain Flatness

±200 MHz, all gains

0.9

Gain Step Error

All gain states

0.49

Group Delay Variation

Between any attenuation step

Output IP3

Maximum gain, −4 dBm per tone

dBm

Minimum gain, −18 dBm per tone

dBm

Output P1dB

Maximum gain

15.8

dBm

Minimum gain

−3.7

dBm

Noise Figure

Maximum gain

8.7

Minimum gain

13.5

Return Loss

Input

−24

Output

Minimum gain

−12

Maximum gain

−11

CMRR

SPI PORT AND FAST ATTACK

SDIO, SCLK, CS, FA pins

Logic Low

0.18

Logic High

1.62

1.8

Fast Attack Response Time

ENABLE INTERFACE

ENBL pin

Voltage Level

To Enable

ENBL voltage (VENBL) increasing

1.62

1.8

To Disable

Enable/disable voltage (VENBLDN) increasing

0.18

Time

Enable

Disable

POWER SUPPLY INTERFACE

VPOSx pins

Supply Voltage

Main supply

4.75

5.25

Quiescent Current

Device enabled

125

Power Consumption

Device enabled

625

Power-down mode

18.5

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