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ADL5335ACPZN-R7 Scheda tecnica(PDF) 15 Page - Analog Devices |
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ADL5335ACPZN-R7 Scheda tecnica(HTML) 15 Page - Analog Devices |
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15 / 16 page ![]() Data Sheet ADL5335 Rev. 0 | Page 15 of 16 APPLICATIONS INFORMATION BASIC CONNECTIONS Figure 25 shows the basic connections for operating the ADL5335. Apply a 5 V voltage to the supply pins (VPOS1, VPOS2, and VPOS3). Decouple each supply pin with at least one low inductance, surface-mount ceramic, 0.1 μF capacitor placed as close to the device as possible. The balanced differential inputs are decoupled using 100 pF capacitors and so is the 50 Ω load on the RF output. The serial peripheral interface pins (SCLK, SDIO, and CS), fast attack (FA), and enable (ENBL) pins operate at an 1.8 V voltage. To enable the ADL5335, pull the ENBL pin high (1.8 V). A low on the ENBL pin sets the device to power-down mode, reducing the current to approximately 3.7 mA. For additional information on device operation, see the EV-ADL5335SD1Z User Guide. 12 11 10 1 3 4 9 2 VPOS1 RFIN– RFIN+ VPOS2 FA ENBL RFOUT GND5 ADL5335 0.1µF SERIAL PERIPHERAL INTERFACE 100pF 0.1µF 100pF BALANCED SOURCE 100pF 100pF 100pF 0.1µF 100pF 50Ω LOAD 1.8V 1.8V NOTES 1. THE 100pF CAPACITORS ON THE RFIN– AND RFIN+ PINS ARE OPTIONAL BECAUSE THE DEVICE IS INTERNALLY AC-COUPLED. Figure 25. Basic Connections |
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