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DAC7553 Scheda tecnica(PDF) 17 Page - Texas Instruments |
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DAC7553 Scheda tecnica(HTML) 17 Page - Texas Instruments |
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17 / 20 page ![]() www.ti.com INTEGRAL AND DIFFERENTIAL LINEARITY GLITCH ENERGY CHANNEL-TO-CHANNEL CROSSTALK APPLICATION INFORMATION Waveform Generation Generating ±5-V, ±10-V, and ± 12-V Outputs For DAC7553 VREFH DAC7553 _ + Vdac R2 R1 REF3140 VREF Vtail VOUT OPA130 Vout + VREF R2 R1 ) 1 Din 4096 * V tail R2 R1 (1) DAC7553 SLAS477 – AUGUST 2005 change the loop can generate. A DNL error less than –1 LSB (non-monotonicity) can create loop instability. The DAC7553 uses precision thin-film resistors pro- A DNL error greater than +1 LSB implies unnecess- viding exceptional linearity and monotonicity. Integral arily large voltage steps and missed voltage targets. linearity error is typically within (+/-) 0.35 LSBs, and With high DNL errors, the loop loses its stability, differential linearity error is typically within (+/-) 0.08 resolution, and accuracy. Offering 12-bit ensured LSBs. monotonicity and ± 0.08 LSB typical DNL error, 755X DACs are great choices for precision control loops. Loop Speed: The DAC7553 uses a proprietary architecture that Many factors determine control loop speed. Typically, minimizes glitch energy. The code-to-code glitches the conversion time of the ADC and the computation are so low, they are usually buried within the time of the MCU are the two major factors that wide-band noise and cannot be easily detected. The dominate the time constant of the loop. DAC settling DAC7553 glitch is typically well under 0.1 nV-s. Such time is rarely a dominant factor because ADC conver- low glitch energy provides more than 10X improve- sion times usually exceed DAC conversion times. ment over industry alternatives. DAC offset, gain, and linearity errors can slow the loop down only during the start-up. Once the loop reaches its steady-state operation, these errors do The DAC7553 architecture is designed to minimize not affect loop speed any further. Depending on the channel-to-channel crosstalk. The voltage change in ringing characteristics of the loop's transfer function, one channel does not affect the voltage output in DAC glitches can also slow the loop down. With its 1 another channel. The DC crosstalk is in the order of a MSPS (small-signal) maximum data update rate, few microvolts. AC crosstalk is also less than –100 DAC7553 can support high-speed control loops. dBs. This provides orders of magnitude improvement Ultralow glitch energy of the DAC7553 significantly over certain competing architectures. improves loop stability and loop settling time. Generating Industrial Voltage Ranges: For control loop applications, DAC gain and offset errors are not important parameters. This could be exploited to lower trim and calibration costs in a Due to its exceptional linearity, low glitch, and low high-voltage control circuit design. Using an oper- crosstalk, the DAC7553 is well suited for waveform ational amplifier (OPA130), and a voltage reference generation (from DC to 10 kHz). The DAC7553 (REF3140), the DAC7553 can generate the wide large-signal settling time is 5 µs, supporting an voltage swings required by the control loop. update rate of 200 KSPS. However, the update rates can exceed 1 MSPS if the waveform to be generated consists of small voltage steps between consecutive DAC updates. To obtain a high dynamic range, REF3140 (4.096 V) or REF02 (5 V) are rec- ommended for reference voltage generation. Precision Industrial Control Industrial control applications can require multiple feedback loops consisting of sensors, ADCs, MCUs, DACs, and actuators. Loop accuracy and loop speed Figure 31. Low-cost, Wide-swing Voltage Gener- are the two important parameters of such control ator for Control Loop Applications loops. Loop Accuracy: The output voltage of the configuration is given by: In a control loop, the ADC has to be accurate. Offset, gain, and the integral linearity errors of the DAC are not factors in determining the accuracy of the loop. Fixed R1 and R2 resistors can be used to coarsely As long as a voltage exists in the transfer curve of a set the gain required in the first term of the equation. monotonic DAC, the loop can find it and settle to it. Once R2 and R1 set the gain to include some On the other hand, DAC resolution and differential minimal over-range, a DAC7553 channel could be linearity do determine the loop accuracy, because used to set the required offset voltage. Residual each DAC step determines the minimum incremental 17 |
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