MB90335 datasheet(61/84 Pages) FUJI

61 / 84 page

MB90335 Series

17. Low power consumption (standby) mode

•The F2MC-16LX can be set to save power consumption by selecting and setting the low power consumption

mode.

• CPU operation mode and functional description

• Register list

CPU

operating clock

Operation

mode

Description

PLL clock

Normally

run

The CPU and peripheral resources operate at the clock frequency obtained by

PLL multiplication of the oscillator clock (HCLK) frequency.

Sleep

Only peripheral resources operate at the clock frequency obtained by PLL

multiplication of the oscillator clock (HCLK) frequency.

Time-base

timer

Only the time-base timer operates at the clock frequency obtained by PLL

multiplication of the oscillator clock (HCLK) frequency.

Stop

The CPU and peripheral resources are suspended with the oscillator clock

stopped.

Main clock

normally

run

The CPU and peripheral resources operate at the clock frequency obtained by

dividing the oscillator clock (HCLK) frequency by two.

Sleep

Only peripheral resources operate at the clock frequency obtained by dividing the

oscillator clock (HCLK) frequency by two.

Time-base

timer

Only the time-base timer operates at the clock frequency obtained by dividing the

oscillator clock (HCLK) frequency by two.

Stop

The CPU and peripheral resources are suspended with the oscillator clock

stopped.

CPU intermittent

operation mode

Normally

run

The halved or PLL-multiplied oscillator clock (HCLK) frequency is used for

operation while being decimated in a certain period.

Lowe power consumption mode control register (LPMCR)

Initial Value

Address : 0000A0H

00011000B

( W )

( R/W )

( W )

( R/W )

SLP

( W )

STP

SPL

RST

TMD

CG1

CG0

Reserved

Preliminary

2004.01.09

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