NT5CB128M8GP-EKB datasheet(92/160 Pages) NANYA

92 / 160 page

Version 2.2

Nanya Technology Cooperation ©

04/2019

NTC Proprietary

Level: Property

DDR3(L) 1Gb SDRAM

NT5CB(C)128M8GN / NT5CB(C)64M16GP

DDR3L AC and DC Logic Input Levels for DQ and DM

Symbol

Parameter

DDR3L

Unit

Notes

1066

1333,1600

1866

Min

Max

Min

Max

Min

Max

VIH.DQ(DC90)

DC input logic high

Vref + 0.09

VDD

Vref + 0.09

VDD

Vref + 0.09

VDD

VIL.DQ(DC90)

DC input logic low

VSS

Vref - 0.09

VSS

Vref - 0.09

VSS

Vref - 0.09

VIH.DQ(AC160)

AC input logic high

Vref + 0.16

Note 2

Vref + 0.16

Note 2

1,2

VIL.DQ(AC160)

AC input logic low

Note 2

Vref - 0.16

Note 2

Vref - 0.16

1,2

VIH.DQ(AC135)

AC input logic high

Vref + 0.135

Note 2

Vref + 0.135

Note 2

Vref + 0.135

Note 2

1,2

VIL.DQ(AC135)

AC input logic low

Note 2

Vref - 0.135

Note 2

Vref - 0.135

Note 2

Vref - 0.135

1,2

VIH.DQ(AC130)

AC input logic high

Vref + 0.13

Note 2

1,2

VIL.DQ(AC130)

AC input logic low

Note 2

Vref - 0.13

1,2

VRefDQ(DC)

Reference Voltage

for DQ, DM inputs

0.49 * VDD

0.51 * VDD

0.49 * VDD

0.51 * VDD

0.49 * VDD

0.51 * VDD

3,4

NOTE 1 For input only pins except

REET. Vref = VrefDQ(DC).

NOTE 2 See “Overshoot and Undershoot Specifications”.

NOTE 3 The AC peak noise on VRef may not allow VRef to deviate from VRefDQ(DC) by more than +/-1% VDD (for reference: approx. +/- 13.5 mV).

NOTE 4 For reference: approx. VDD/2 +/- 13.5 mV.

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