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XIO2000AI Scheda tecnica(PDF) 75 Page - Texas Instruments

Il numero della parte XIO2000AI
Spiegazioni elettronici  PCI Express to PCI Bus Translation Bridge
PDF  160 Pages
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Produttore elettronici  TI1 [Texas Instruments]
Homepage  http://www.ti.com
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XIO2000AI Scheda tecnica(HTML) 75 Page - Texas Instruments

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Classic PCI Configuration Space
66
April 2007 Revised October 2008
SCPS155C
4.35 Power Management Data Register
The read-only register is not applicable to the bridge and returns 00h when read.
PCI register offset:
57h
Register type:
Read-only
Default value:
00h
BIT NUMBER
7
6
5
4
3
2
1
0
RESET STATE
0
0
0
0
0
0
0
0
4.36 MSI Capability ID Register
This read-only register identifies the linked list item as the register for message signaled interrupts capabilities.
The register returns 05h when read.
PCI register offset:
60h
Register type:
Read-only
Default value:
05h
BIT NUMBER
7
6
5
4
3
2
1
0
RESET STATE
0
0
0
0
0
1
0
1
4.37 Next Item Pointer Register
The contents of this read-only register indicate the next item in the linked list of capabilities for the bridge. This
register reads 80h pointing to the subsystem ID capabilities registers.
PCI register offset:
61h
Register type:
Read-only
Default value:
80h
BIT NUMBER
7
6
5
4
3
2
1
0
RESET STATE
1
0
0
0
0
0
0
0



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