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GD25B16CSIG Scheda tecnica(PDF) 32 Page - GigaDevice Semiconductor (Beijing) Inc.

Il numero della parte GD25B16CSIG
Spiegazioni elettronici  3.3V Uniform Sector Dual and Quad Serial Flash
PDF  53 Pages
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Produttore elettronici  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
Homepage  http://www.gigadevice.com/
Logo GIGADEVICE - GigaDevice Semiconductor (Beijing) Inc.

GD25B16CSIG Scheda tecnica(HTML) 32 Page - GigaDevice Semiconductor (Beijing) Inc.

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3.3V Uniform Sector
Dual and Quad Serial Flash
GD25B16C
32
Figure 27. High Performance Mode Sequence Diagram
7.24.
Continuous Read Mode Reset (CRMR) (FFH)
The Dual/Quad I/O Fast Read
operations, “Continuous Read Mode” bits (M7-0) are implemented to further reduce
command overhead. By setting the (M7-0) to AXH, the next Dual/Quad I/O Fast Read operations do not require the
BBH/EBH/E7H command code.
Because the GD25B16C has no hard
ware reset pin, so if Continuous Read Mode bits are set to “AXH”, the GD25B16C
will not recognize any standard SPI commands. So Continuous Read Mode Reset command will release the Continuous
Read Mode from the “AXH” state and allow standard SPI command to be recognized. The command sequence is show in
Figure28.
Figure 28. Continuous Read Mode Reset Sequence Diagram
0
1
2
3
4
5
6
7
CS#
SCLK
SI(IO0)
SO(IO1)
IO2
IO3
FFH
Mode Bit Reset for Quad/Dual I/O
Don`t Care
Don`t Care
Don`t Care
Command
0
1
2
3
4
5
6
7
A3H
CS#
SCLK
SI
8
9
29 30 31
MSB
2
1
0
3 Dummy Bytes
23 22
SO
High Performance Mode
HPM
t



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