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GD25B16CSIG Scheda tecnica(PDF) 52 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD25B16CSIG Scheda tecnica(HTML) 52 Page - GigaDevice Semiconductor (Beijing) Inc. |
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52 / 53 page ![]() 3.3V Uniform Sector Dual and Quad Serial Flash GD25B16C 52 11. REVISION HISTORY Version No Description Page Date 1.0 Initial Release All 2015-7-23 1.1 Modify AC CHARACTERISTICS: tCHCL Min.0.2 V/ns Change to 0.1 V/ns tCLCH Min.0.2 V/ns Change to 0.1 V/ns Modify POWER-ON TIMING: tPUW Min 1ms Change to 5ms Modify Figure 40. Power-on Timing Sequence Diagram --- 2015-11-5 1.2 Modify AC CHARACTERISTICS: add tRST_R & tRST_P & tRST_E Modify POWER-ON TIMING: TVSL Min 10us Change to 5ms --- 2015-12-18 1.3 Modify the length the Unique ID from 64 bits to 128 bits Modify tVSL from 5ms to 1.8ms Modify VWI from 2.1~2.5V to 1.5~2.5V Delete DATA RETENTION AND ENDURANCE Delete Output Short Circuit Current Modify VCC from -0.6~VCC+0.4 to -0.6~4.2V Modify Icc9 from 400~800uA to 0.6~1.2mA Add tRS to the AC Characteristic, of which the min value is 100us Modify tBE1 max value from 0.3/0.7s to 0.8/1.2s (<50K/50-100K cycling) Modify tBE2 max value from 0.5/0.8s to 1.2/2.0s (<50K/50-100K cycling) Delete tRST_P and tRST_R Add tRST, of which the max. value is 30us Add J and E to 7th code of ordering information Update the description of all packages P4 P42 P42 P42 P42 P42 P44 P45 P45 P45 P45 P45 P48 P49-51 2018-5-21 1.4 Modify 4BH command Modify Ordering Information P33 P48 2018-9-11 1.5 Modify tSE max value from 150/300ms to 300ms Modify tBE1 max value from 0.8/1.2s to 1.2s Modify tBE2 max value from 1.2/2.0s to 2.0s P45 P45 P46 2018-12-4 |
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