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GD25VQ127CSFS Scheda tecnica(PDF) 5 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD25VQ127CSFS Scheda tecnica(HTML) 5 Page - GigaDevice Semiconductor (Beijing) Inc. |
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5 / 62 page ![]() Uniform Sector Dual and Quad Serial Flash GD25VQ127C 5 2. GENERAL DESCRIPTION The GD25VQ127C (128M-bit) Serial flash supports the standard Serial Peripheral Interface (SPI), and supports the Dual/Quad SPI: Serial Clock, Chip Select, Serial Data I/O0 (SI), I/O1 (SO), I/O2 (WP#), and I/O3 (HOLD#/ RESET#). The Dual I/O data is transferred with speed of 208Mbits/s and the Quad I/O & Quad output data is transferred with speed of 416Mbits/s. CONNECTION DIAGRAM Note: 1. Only for special order, Pin 3 of 16-LEA SOP is RESET# pin. Please contact GigaDevice for detail. VCC WP# (IO2) HOLD#/ RESET# (IO3) VSS SI (IO0) CS# SCLK NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC A B C D E F 4 3 2 1 24-BALL TFBGA Top View SO (IO1) CS# SO (IO0) WP# (IO2) VSS Top View VCC HOLD#/ RESET# (IO3) SCLK SI (IO0) 16-LEAD SOP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 NC NC NC NC NC NC NC NC (1) CS# SO (IO1) WP# (IO2) VSS Top View VCC HOLD#/ RESET# (IO3) SCLK SI (IO0) 8–LEAD SOP/VSOP/DIP 1 2 3 4 5 6 7 8 CS# VSS Top View VCC SCLK 8–LEAD WSON 1 2 3 4 5 6 7 8 HOLD#/ RESET# (IO3) SI (IO0) SO (IO1) WP# (IO2) |
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