CC3235MODASF datasheet(72/100 Pages) TI1

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CC3235MODAS, CC3235MODASF

SWRS233 – OCTOBER 2019

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Detailed Description

6.9

Memory

6.9.1

Internal Memory

The CC3235x device within the CC3235MODAx modules includes on-chip SRAM to which application

programs are downloaded and executed. The application developer must share the SRAM for code and

data. The micro direct memory access (μDMA) controller can transfer data to and from SRAM and various

peripherals. The CC3235x device ROM holds the rich set of peripheral drivers, which saves SRAM space.

For more information on drivers, see the CC3235x API list.

6.9.1.1

SRAM

The CC3235MODAx MCU family provides 256KB of on-chip SRAM. Internal RAM is capable of selective

retention during LPDS mode. This internal SRAM is at offset 0x2000 0000 of the device memory map.

Use the μDMA controller to transfer data to and from the SRAM.

When the device enters low-power mode, the application developer can choose to retain a section of

memory based on need. Retaining the memory during low-power mode provides a faster wakeup. The

application developer can choose the amount of memory to retain in multiples of 64KB. For more

information, see the API guide.

6.9.1.2

ROM

The internal zero-wait-state ROM of the CC3235MODAx module is at address 0x0000 0000 of the device

memory and is programmed with the following components:

•

Bootloader

•

Peripheral driver library (DriverLib) release for product-specific peripherals and interfaces

The bootloader is used as an initial program loader (when the serial Flash memory is empty). The

DriverLib software library of the CC3235MODAx MCU controls on-chip peripherals with a bootloader

capability. The library performs peripheral initialization and control functions, with a choice of polled or

interrupt-driven peripheral support. The DriverLib APIs in ROM can be called by applications to reduce

Flash memory requirements and free the Flash memory to be used for other purposes.

6.9.1.3

Flash Memory

The CC3235SF device within the CC3235MODASF modules comes with an on-chip Flash memory of

1MB that allows application code to execute in place while freeing SRAM exclusively for read-write data.

The Flash memory is used for code and constant data sections and is directly attached to the

ICODE/DCODE bus of the Arm® Cortex®-M4 core. A 128-bit-wide instruction prefetch buffer allows

maintenance of maximum performance for linear code or loops that fit inside the buffer.

The Flash memory is organized as 2-KB sectors that can be independently erased. Reads and writes can

be performed at word (32-bit) level.

6.9.1.4

Memory Map

Table 6-4 describes the various MCU peripherals and how they are mapped to the processor memory. For

more information on peripherals, see the API document.

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