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CC3235MODASF Scheda tecnica(PDF) 13 Page - Texas Instruments |
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CC3235MODASF Scheda tecnica(HTML) 13 Page - Texas Instruments |
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13 / 100 page ![]() 13 CC3235MODAS, CC3235MODASF www.ti.com SWRS233 – OCTOBER 2019 Submit Documentation Feedback Product Folder Links: CC3235MODAS CC3235MODASF Terminal Configuration and Functions Copyright © 2019, Texas Instruments Incorporated Table 4-1. Module Pin Descriptions MODULE PIN TYPE(1) CC3235 DEVICE PIN NO. MODULE PIN DESCRIPTION NO. NAME 1 GND – – Ground 2 GND – – Ground 3 GPIO10 I/O 1 GPIO(2) 4 GPIO11 I/O 2 GPIO(2) 5 GPIO14 I/O 5 GPIO(2) 6 GPIO15 I/O 6 GPIO(2) 7 GPIO16 I/O 7 GPIO(2) 8 GPIO17 I/O 8 GPIO(2) 9 GPIO12 I/O 3 GPIO(2) 10 GPIO13 I/O 4 GPIO(2) 11 GPIO22 I/O 15 GPIO(2) 12 JTAG_TDI I/O 16 JTAG TDI input. Leave unconnected if not used on product(2) 13 FLASH_SPI_MISO I – External Serial Flash Programming: SPI data in 14 FLASH_SPI_nCS_IN I – External Serial Flash Programming: SPI chip select (active low) 15 FLASH_SPI_CLK I – External Serial Flash Programming: SPI clock 16 GND – – Ground 17 FLASH_SPI_MOSI O – External Serial Flash Programming: SPI data out 18 JTAG_TDO I/O 17 JTAG TDO output. Leave unconnected if not used on product(1) 19 GPIO28 I/O 18 GPIO(2) 21 JTAG_TCK I/O 19 JTAG TCK input. Leave unconnected if not used on product.(2) An internal 100 kΩ pull down resistor is tied to this pin. 22 JTAG_TMS I/O 20 JTAG TMS input. Leave unconnected if not used on product.(2) 23 SOP2 – 21 An internal 100 kΩ pull down resistor is tied to this SOP pin. An external 10 kΩ resistor is required to pull this pin high. See Section 6.11.1 for SOP[2:0] configuration modes. 24 SOP1 – 34 An internal 100 kΩ pull down resistor is tied to this SOP pin. An external 10 kΩ resistor is required to pull this pin high. See Section 6.11.1 for SOP[2:0] configuration modes. 25 GND – – Ground 26 GND – – Ground 27 GND – – Ground 28 GND – – Ground 29 GND – – Ground 30 GND – – Ground 32 GND – – Ground 34 SOP0 – 35 An internal 100 kΩ pull down resistor is tied to this SOP pin. An external 10 kΩ resistor is required to pull this pin high. See Section 6.11.1 for SOP[2:0] configuration modes. 35 nRESET I 32 There is an internal, 100 kΩ, pull-up resistor option from the nRESET pin to VBAT_RESET. Note: VBAT_RESET is not connected to VBAT1 or VBAT2 within the module. The following connection schemes are recommended: • Connect nRESET to a switch, external controller, or host, only if nRESET will be in a defined state under all operating conditions. Leave VBAT_RESET unconnected to save power. • If nRESET cannot be in a defined state under all operating conditions, connect VBAT_RESET to the main module power supply (VBAT1 and VBAT2). Due to the internal pull- up resistor a leakage current of 3.3 V / 100 kΩ is expected. 36 VBAT_RESET – 37 37 VBAT1 Power 39 Power supply for the module, must be connected to battery (2.3 V to 3.6 V) |
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