PFS154 datasheet(3/91 Pages) PADAUK

3 / 91 page

PFS154

8bit MTP Type IO Controller

Page 3 of 91

PDK-DS-PFS154_CN_V105 –Jun. 9, 2020

Table of Contents

Features.................................................................................................................................8

1.1.

Special Features ...................................................................................................................... 8

1.2.

System Features...................................................................................................................... 8

1.3.

CPU Features .......................................................................................................................... 8

1.4.

Package Information ................................................................................................................ 8

General Description and Block Diagram ............................................................................9

Pin Definition and Functional Description........................................................................10

Device Characteristics .......................................................................................................16

4.1.

DC/AC Characteristics ............................................................................................................16

4.2.

Absolute Maximum Ratings.....................................................................................................17

4.3.

Typical IHRC Frequency vs. VDD (calibrated to 16MHz).........................................................18

4.4.

Typical ILRC Frequency vs. VDD ............................................................................................18

4.5.

Typical IHRC Frequency vs. Temperature (calibrated to 16MHz) ............................................19

4.6.

Typical ILRC Frequency vs. Temperature................................................................................19

4.7.

Typical Operating Current vs. VDD and CLK=IHRC/n .............................................................20

4.8.

Typical Operating Current vs. VDD and CLK=ILRC/n..............................................................20

4.9.

Typical Operating Current vs. VDD and CLK=32KHz EOSC / n ..............................................21

4.10. Typical Operating Current vs. VDD and CLK=1MHz EOSC / n................................................21

4.11. Typical Operating Current vs. VDD and CLK=4MHz EOSC / n................................................22

4.12. Typical IO pull high resistance.................................................................................................22

4.13. Typical IO input high/low threshold voltage (VIH/VIL) ................................................................23

4.14. Typical IO driving current (IOH) and sink current (IOL) ...............................................................24

4.15. Typical power down current (IPD) and power save current (IPS) ................................................25

Functional Description .......................................................................................................26

5.1.

Program Memory – MTP .........................................................................................................26

5.2.

Boot-Up...................................................................................................................................26

5.3.

Data Memory – SRAM ............................................................................................................27

5.4.

Oscillator and clock .................................................................................................................27

5.4.1

Internal High RC oscillator and Internal Low RC oscillator ...........................................27

5.4.2

IHRC calibration ..........................................................................................................27

5.4.3

IHRC Frequency Calibration and System Clock ..........................................................28

5.4.4

External Crystal Oscillator ...........................................................................................29

5.4.5

System Clock and LVR levels ......................................................................................31

5.4.6

System Clock Switching ..............................................................................................31

5.5.

16-bit Timer (Timer16).............................................................................................................33

5.6.

Watchdog Timer ......................................................................................................................34

5.7.

Interrupt Controller ..................................................................................................................35

5.8.

Power-Save and Power-Down ................................................................................................38

5.8.1

Power-Save mode (“stopexe”) .....................................................................................38

5.8.2

Power-Down mode (“stopsys”) ....................................................................................39

5.8.3

Wake-up ......................................................................................................................40

PFS154 Scheda tecnica(PDF) 3 Page - PADAUK Technology.

PFS154 Scheda tecnica(HTML) 3 Page - PADAUK Technology.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91

Scheda tecnica Scarica

Link URL