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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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PFS154 Scheda tecnica(PDF) 35 Page - PADAUK Technology. |
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PFS154 Scheda tecnica(HTML) 35 Page - PADAUK Technology. |
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35 / 91 page  PFS154 8bit MTP Type IO Controller ©Copyright 2020, PADAUK Technology Co. Ltd Page 35 of 91 PDK-DS-PFS154_CN_V105 –Jun. 9, 2020 5.7. Interrupt Controller The hardware diagram of interrupt controller is shown as Fig. 6, there are total 7 interrupt sources for PFS154: PA0, PB0, Timer16, Comparator, Timer2, Timer3, PWMG0. Among them, every interrupt request line to CPU has its own corresponding interrupt control bit to enable or disable it. All the interrupt request flags are set by hardware and cleared by writing intrq register. When the request flags are set, it can be rising edge, falling edge or both, depending on the setting of register integs. All the interrupt request lines are also controlled by engint instruction (enable global interrupt) to enable interrupt operation and disgint instruction (disable global interrupt) to disable it. Fig. 6: Hardware diagram of Interrupt controller |
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