DRV8353FSRTAR datasheet(53/97 Pages) TI

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SW Pin

Inductor

Current

LIM

OUT

UVLO

7 V

Vin

0 V

Figure 8-39. Start-Up Sequence

8.3.5.2.3 Regulation Comparator

The feedback voltage at FB is compared to an internal 2.5-V reference. In normal operation (the output voltage

is regulated), an on-time period is initiated when the voltage at FB falls below 2.5 V. The buck switch stays on for

the on-time, causing the FB voltage to rise above 2.5 V. After the on-time period, the buck switch stays off until

the FB voltage again falls below 2.5 V. During start-up, the FB voltage is below 2.5 V at the end of each on-time,

resulting in the minimum off-time of 300 ns. Bias current at the FB pin is nominally 100 nA.

8.3.5.2.4 Overvoltage Comparator

The feedback voltage at FB is compared to an internal 2.875-V reference. If the voltage at FB rises above 2.875

V, the on-time pulse is immediately terminated. This condition can occur if the input voltage or the output load

change suddenly. The buck switch does not turn on again until the voltage at FB falls below 2.5 V.

8.3.5.2.5 On-Time Generator and Shutdown

The on-time for the LM5008A is determined by the RT resistor and is inversely proportional to the input voltage

(VIN), resulting in an almost constant frequency as Vin is varied over its range. The on-time equation for the

LM5008A is Equation 8.

TON = 1.385 × 10–10 × RT / VIN

(8)

RT must be selected for a minimum on-time (at maximum VIN) greater than 400 ns, for correct current limit

operation. This requirement limits the maximum frequency for each application, depending on VIN and VOUT.

The LM5008A can be remotely disabled by taking the RT/SD pin to ground. See Figure 8-40. The voltage at the

RT/SD pin is between 1.5 V and 3 V, depending on VIN and the value of the RT resistor.

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SLVSFV1 – SEPTEMBER 2020

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DRV8353FSRTAR Scheda tecnica(PDF) 53 Page - Texas Instruments