PIMXRT406LCJM4A datasheet(13/71 Pages) NXP

13 / 71 page

Modules list

i.MX RT1015 Crossover Processors Data Sheet for Consumer Products, Rev. 2, 03/2021

NXP Semiconductors

3.2

Recommended connections for unused analog interfaces

Table 5 shows the recommended connections for unused analog interfaces.

POR_B

This cold reset negative logic input resets all modules and logic in the IC.

May be used in addition to internally generated power on reset signal (logical AND, both internal

and external signals are considered active low).

ONOFF

ONOFF can be configured in debounce, off to on time, and max time-out configurations. The

debounce and off to on time configurations supports 0, 50, 100 and 500 ms. Debounce is used to

generate the power off interrupt. While in the ON state, if ONOFF button is pressed longer than

the debounce time, the power off interrupt is generated. Off to on time supports the time it takes

to request power on after a configured button press time has been reached. While in the OFF

state, if ONOFF button is pressed longer than the off to on time, the state will transition from OFF

to ON. Max time-out configuration supports 5, 10, 15 seconds and disable. Max time-out

configuration supports the time it takes to request power down after ONOFF button has been

pressed for the defined time.

TEST_MODE

TEST_MODE is for NXP factory use. The user can leave this signal floating or tie it to ground.

WAKEUP

A GPIO powered by SNVS domain power supply which can be configured as wakeup source in

SNVS mode.

Table 4. JTAG controller interface summary

JTAG

I/O type

On-chip termination

JTAG_TCK

Input

100 k



pull-down

JTAG_TMS

Input

47 k



pull-up

JTAG_TDI

Input

47 k



pull-up

JTAG_TDO

3-state output

Keeper

JTAG_TRSTB

Input

47 k



pull-up

JTAG_MOD

Input

100 k



pull-down

Table 5. Recommended connections for unused analog interfaces

Module

Pad name

Recommendations

if unused

USB

USB_OTG1_CHD_B, USB_OTG1_DN, USB_OTG1_DP, USB_OTG1_VBUS

Not connected

ADC

VDDA_ADC_3P3

must be powered

even if the ADC is

not used.

Table 3. Special signal considerations (continued)

Signal name

Remarks

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