PIMXRT406LCJM4A datasheet(18/100 Pages) NXP

18 / 100 page

i.MX RT1020 Crossover Processors for Industrial Products, Rev. 2, 03/2021

NXP Semiconductors

Electrical characteristics

4.1.2

Thermal resistance

Following sections provide the thermal resistance data.

4.1.2.1

20 x 20 mm package thermal resistance

Table 9 displays the 20 x 20 mm LQFP package thermal resistance data.

IO supply for GPIO in SDIO1 bank (3.3 V mode)

NVCC_SD0

3.6

IO supply for GPIO in SDIO1 bank (1.8 V mode)

1.65

1.95

IO supply for GPIO bank (3.3 V mode)

NVCC_GPIO

3.6

ESD Damage Immunity:

Human Body Model (HBM)

Charge Device Model (CDM)

Vesd

—

1000

500

Input/Output Voltage range

Vin/Vout

-0.5

OVDD + 0.31 V

Storage Temperature range

TSTORAGE

-40

150

o C

1 OVDD is the I/O supply voltage.

Table 9. 20 x 20 mm package thermal resistance data

Rating

Board type

Symbol

Value

Unit

Junction to Ambient

Natural convection

Single-layer board (1s)

RJA

oC/W

1,2

1 Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)

temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal

resistance.

2 Per JEDEC JESD51-2 with natural convection for horizontally oriented board. Board meets JESD51-9 specification for 1s or

2s2p board, respectively.

Junction to Ambient

Natural convection

Four-layer board (2s2p)

RJA

oC/W

1,2

Junction to Ambient (@200

ft/min)

Single layer board (1s)

RJMA

oC/W

1,3

3 Per JEDEC JESD51-6 with forced convection for horizontally oriented board. Board meets JESD51-9 specification for 1s or

2s2p board, respectively.

Junction to Ambient (@200

ft/min)

Four layer board (2s2p)

RJMA

oC/W

1,3

Junction to Board

—

RJB

oC/W

4 Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is measured on

the top surface of the board near the package.

Junction to Case

—

RJC

oC/W

5 Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method

1012.1).

Junction to Package Top

Natural Convection

JT

oC/W

Table 8. Absolute maximum ratings (continued)

PIMXRT406LCJM4A Scheda tecnica(PDF) 18 Page - NXP Semiconductors

PIMXRT406LCJM4A Scheda tecnica(HTML) 18 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100

Scheda tecnica Scarica

Link URL