 |
Motore di ricerca datesheet componenti elettronici |
|
|
Motore di ricerca datesheet componenti elettronici |
|
PIMXRT406LCAE4A Scheda tecnica(PDF) 35 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
PIMXRT406LCAE4A Scheda tecnica(HTML) 35 Page - NXP Semiconductors |
|
|
35 / 71 page  Electrical characteristics i.MX RT1015 Crossover Processors Data Sheet for Industrial Products, Rev. 2, 03/2021 NXP Semiconductors 35 4.4.4 Debug trace timing specifications Figure 13. ARM_TRACE_CLK specifications SJ9 JTAG_TMS, JTAG_TDI data hold time 25 — ns SJ10 JTAG_TCK low to JTAG_TDO data valid — 44 ns SJ11 JTAG_TCK low to JTAG_TDO high impedance — 44 ns SJ12 JTAG_TRST_B assert time 100 — ns SJ13 JTAG_TRST_B set-up time to JTAG_TCK low 40 — ns 1 TDC = target frequency of SJC 2 VM = mid-point voltage Table 28. Debug trace operating behaviors Symbol Description Min Max Unit T1 ARM_TRACE_CLK frequency of operation — 70 MHz T2 ARM_TRACE_CLK period 1/T1 — MHz T3 Low pulse width 6 — ns T4 High pulse width 6 — ns T5 Clock and data rise time — 1 ns T6 Clock and data fall time — 1 ns T7 Data setup 2 — ns T8 Data hold 0.7 — ns Table 27. JTAG timing (continued) ID Parameter1,2 All frequencies Unit Min Max T4 T6 |
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Italian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
