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MAX96708 Scheda tecnica(PDF) 7 Page - Maxim Integrated Products |
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MAX96708 Scheda tecnica(HTML) 7 Page - Maxim Integrated Products |
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7 / 68 page ![]() AVDD to EP* ........................................................-0.5V to +1.9V DVDD to EP*........................................................-0.5V to +1.9V IOVDD to EP*.......................................................-0.5V to +3.9V LMN_ to EP* (15mA current limit) ........................-0.5V to +3.9V IN_+, IN_- to EP*..................................................-0.5V to +1.9V All Other Pins to EP*......................... -0.5V to (IOVDD + 0.5V)V IN_+, IN_- Short Circuit to Ground or Supply ...........Continuous Operating Temperature Range..........................-40°C to +115°C Junction Temperature......................................................+150°C Storage Temperature Range............................ -40°C to +150°C Soldering Temperature (reflow).......................................+260°C Continuous Power Dissipation TA = +70°C, 32-pin TQFN (derate 34.5 mW/°C above +70°C.) ......................2758.6mW *EP connected to IC ground. For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. 32-Pin TQFN-EP PACKAGE CODE T3255+8 Outline Number 21-0140 Land Pattern Number 90-0013 Thermal Resistance, Single Layer Board: Junction-to-Ambient (θJA) 47 Junction-to-Case Thermal Resistance (θJC) 1.7 Thermal Resistance, Four Layer Board: Junction-to-Ambient (θJA) 29 Junction-to-Case Thermal Resistance (θJC) 1.7 Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Package Thermal Characteristics Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. www.maximintegrated.com Maxim Integrated │ 7 MAX96708 14-Bit GMSL Deserializer with Coax or STP Cable Input |
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