MPC8343ECVRADDB datasheet(19/80 Pages) NXP

Il numero della parte	MPC8343ECVRADDB

Spiegazioni elettronici	MPC8343EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications

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MPC8343EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 11

Freescale Semiconductor

DDR and DDR2 SDRAM

ADDR/CMD/MODT output hold with respect to MCK

tDDKHAX

400 MHz

1.95

—

333 MHz

2.40

—

266 MHz

3.15

—

200 MHz

4.20

—

MCS(n) output setup with respect to MCK

tDDKHCS

400 MHz

1.95

—

333 MHz

2.40

—

266 MHz

3.15

—

200 MHz

4.20

—

MCS(n) output hold with respect to MCK

tDDKHCX

400 MHz

1.95

—

333 MHz

2.40

—

266 MHz

3.15

—

200 MHz

4.20

—

MCK to MDQS Skew

tDDKHMH

–0.6

0.6

MDQ/MECC/MDM output setup with respect to

MDQS

tDDKHDS,

tDDKLDS

400 MHz

700

—

333 MHz

775

—

266 MHz

1100

—

200 MHz

1200

—

MDQ/MECC/MDM output hold with respect to MDQS

tDDKHDX,

tDDKLDX

400 MHz

700

—

333 MHz

900

—

266 MHz

1100

—

200 MHz

1200

—

MDQS preamble start

tDDKHMP

–0.5

× t

MCK – 0.6

–0.5

× t

MCK + 0.6

Table 20. DDR and DDR2 SDRAM Output AC Timing Specifications (continued)

At recommended operating conditions with GVDD of (1.8 or 2.5 V) ± 5%.

Parameter

Symbol 1

Min

Max

Unit

Notes

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