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TRM-915-R250 Scheda tecnica(PDF) 8 Page - Linx Technologies |
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TRM-915-R250 Scheda tecnica(HTML) 8 Page - Linx Technologies |
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8 / 39 page ![]() – – – – 10 11 Low-Power States The module supports three power saving modes: Standby, Sleep and Deep Sleep. Standby and Sleep are included primarily for legacy compatibility with DTS and EUR Series modules. The hardware required to support these two low-power modes fully is not present in the 25 Series modules. As a result, the current consumption in these two modes is considerably higher than their DTS / EUR counterparts. It is recommended that applications utilize the Deep Sleep mode for power savings. In the Sleep and Deep Sleep modes, the transceiver is powered down and does not synchronize with other modules. Sleep mode draws more current than Deep Sleep mode. In Deep Sleep mode the module draws the least current. To wake the module up from this mode the RESET line must be held low for at least 20µs and then taken high. The module does not monitor the receive channel in either mode. Therefore, a sleeping module cannot be woken through the RF interface. If regACKONWAKE is enabled, the module transmits a 0x06 character on the TXD line once awakened from a low-power mode or power-off state. This indicates that the module is ready to resume operations. Figure 8 indicates the line states while in a low-power mode. 250 Series Transceiver Low-Power Line States Line Name Pin Number Pin State PR_PKT 1 Driven low TXD 2 Input with weak pull-up RESET 6 Input with weak pull-up C2D 7 Input with weak pull-up CMD_RSP 9 Input with weak pull-up EX 10 Driven low RSSI 14 Driven low CMD 15 Input with weak pull-up BE 16 Input with weak pull-up CTS 19 In Standby, Sleep: Driven Low, In Deep Sleep: Driven High RXD 20 Input with weak pull-up Figure 8: 250 Series Transceiver Low-Power Line States Standby Standby is selected by writing a 0x02 to regOPMODE. In this mode, the internal oscillator of the module’s protocol controller is lowered to its slowest setting. The transmitter and receiver hardware is in power-down, but the radio’s oscillator is enabled and running. The module wakes from standby in less than 6ms. A low pulse on the RXD line wakes the module. This pulse should be at least 1 bit-time in duration, so sending any byte to the UART wakes it with the low start bit. Because the module’s oscillator is not capable at running at ultra-low speeds, use of this mode is not recommended for new applications. The RAM contents are preserved during standby. If the RAM fails an integrity check, the module issues itself a software reset to force re-initialization. Sleep Sleep is selected by writing a 0x01 to regOPMODE. The internal oscillator of the module’s protocol controller is lowered to its slowest setting, and all radio services are stopped (receiver, transmitter, oscillator, etc.). The module wakes from sleep in less than 6ms. A low pulse on the RXD line wakes the module. This pulse should be at least 1 bit-time in duration, so sending any byte to the UART wakes it with the low start bit. Because the module’s oscillator is not capable at running at ultra-low speeds, use of this mode is not recommended for new applications. The RAM contents are preserved during sleep. If the RAM fails an integrity check, the module issues itself a software reset to force re-initialization. Deep Sleep Deep sleep is selected by writing a 0x03 to regOPMODE. When the module is put into deep sleep, the CTS line is brought high to indicate that the module is not ready to accept UART data. The radio is placed in its lowest power mode and all services are stopped. The protocol controller’s oscillator is also stopped and all non-essential functions are turned off. While powered, this mode consumes the least amount of current. The module wakes from deep sleep in less than 6ms. A low pulse of at least 20µs on the RESET line starts the waking process, but the module doesn’t begin executing wake instructions until the RESET line is returned high. As with the other low-power modes, the RAM contents are preserved. If the RAM fails an integrity check, the module issues itself a software reset to force re-initialization. Note that, if the volatile data rate register is changed during the host application initialization (regUARTDATARATE), the re-initialization returns the module to the value in the non-volatile counterpart (regNVUSERDATARATE). |
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