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ST25DV64KC Scheda tecnica(PDF) 163 Page - STMicroelectronics |
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ST25DV64KC Scheda tecnica(HTML) 163 Page - STMicroelectronics |
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163 / 203 page ![]() Figure 95. Logic 1, low data rate, fast commands 75.52 µs Note: For fast commands, bit coding using two subcarriers is not supported. A.2 ST25DVxxKC to VCD frames Frames are delimited by an SOF and an EOF. They are implemented using code violation. Unused options are reserved for future use. For the low data rate, the same subcarrier frequency or frequencies is/are used. In this case, the number of pulses is multiplied by 4. For the Fast commands using one subcarrier, all pulse numbers and times are divided by 2. A.3 SOF when using one subcarrier A.3.1 High data rate For the Fast commands, the SOF comprises an unmodulated time of 28.32 µs, followed by 12 pulses at 423.75 kHz (fC/32), and a logic 1 that consists of an unmodulated time of 9.44 µs followed by four pulses at 423.75 kHz, as shown in Figure 96. Figure 96. Start of frame, high data rate, one subcarrier, fast commands 56.64 µs 18.88 µs A.3.2 Low data rate For the Fast commands, the SOF comprises an unmodulated time of 113.28 µs, followed by 48 pulses at 423.75 kHz (fC/32), and a logic 1 that includes an unmodulated time of 37.76 µs followed by 16 pulses at 423.75 kHz, as shown in Figure 97. Figure 97. Start of frame, low data rate, one subcarrier, fast commands 226.56 µs 75.52 µs ST25DV04KC ST25DV16KC ST25DV64KC ST25DVxxKC to VCD frames DS13519 - Rev 3 page 163/203 |
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