HT46R232 datasheet(19/50 Pages) HOLTEK

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HT46R232/HT46C232

Rev. 1.40

November 23, 2005

A (7+1) bits mode PWM cycle is divided into two modu-

lation cycles (modulation cycle0~modulation cycle 1).

Each modulation cycle has 128 PWM input clock period.

In a (7+1) bits PWM function, the contents of the PWM

PWM.7~PWM.1. The group 2 is denoted by AC which is

the value of PWM.0.

In a (7+1) bits mode PWM cycle, the duty cycle of each

modulation cycle is shown in the table.

Parameter

AC (0~1)

Duty Cycle

Modulation cycle i

(i=0~1)

i<AC

DC+1

128

³AC

128

The modulation frequency, cycle frequency and cycle

duty of the PWM output signal are summarized in the

following table.

PWM

Modulation Frequency

PWM Cycle

Frequency

PWM Cycle

Duty

fSYS/64 for (6+2) bits mode

fSYS/128 for (7+1) bits mode

fSYS/256

[PWM]/256

A/D Converter

The 8 channels and 10-bit resolution A/D converter are

implemented in this microcontroller. The reference volt-

age is VDD. The A/D converter contains 4 special regis-

ters which are; ADRL (24H), ADRH (25H), ADCR (26H)

and ACSR (27H). The ADRH and ADRL are A/D result

read-only. After the A/D conversion is completed, the

ADRH and ADRL should be read to get the conversion

result data. The ADCR is an A/D converter control regis-

ter, which defines the A/D channel number, analog

channel select, start A/D conversion control bit and the

end of A/D conversion flag. If the users want to start an

A/D conversion, define PB configuration, select the con-

verted analog channel, and give START bit a raising

edge and falling edge (0

®1®0). At the end of A/D con-

version, the EOCB bit is cleared and an A/D converter

interrupt occurs (if the A/D converter interrupt is en-

abled). The ACSR is A/D clock setting register, which is

used to select the A/D clock source.

The A/D converter control register is used to control the

A/D converter. The bit2~bit0 of the ADCR are used to

select an analog input channel. There are a total of eight

channels to select. The bit5~bit3 of the ADCR are used

to set PB configurations. PB can be an analog input or

as digital I/O line decided by these 3 bits. Once a PB line

is selected as an analog input, the I/O functions and

pull-high resistor of this I/O line are disabled and the A/D

converter circuit is power on. The EOCB bit (bit6 of the

ADCR) is end of A/D conversion flag. Check this bit to

know when A/D conversion is completed. The START

bit of the ADCR is used to begin the conversion of the

A/D converter. Giving START bit a rising edge and fall-

ing edge means that the A/D conversion has started. In

order to ensure the A/D conversion is completed, the

START should remain at

²0² until the EOCB is cleared to

²0² (end of A/D conversion).

Bit 7 of the ACSR register is used for test purposes only

and must not be used for other purposes by the applica-

tion program. Bit1 and bit0 of the ACSR register are

used to select the A/D clock source.

When the A/D conversion has completed, the A/D inter-

rupt request flag will be set. The EOCB bit is set to

²1²

when the START bit is set from

²0² to ²1².

Important Note for A/D initialization:

Special care must be taken to initialize the A/D con-

verter each time the Port B A/D channel selection bits

are modified, otherwise the EOCB flag may be in an un-

defined condition. An A/D initialization is implemented

by setting the START bit high and then clearing it to zero

within 10 instruction cycles of the Port B channel selec-

tion bits being modified. Note that if the Port B channel

selection bits are all cleared to zero then an A/D initial-

ization is not required.

Bit No.

Label

Function

ACS0

ACS1

ACS2

Defines the analog channel select

PCR0

PCR1

PCR2

Defines the port B configuration select. If PCR0, PCR1 and PCR2 are all zero, the ADC circuit is

power off to reduce power consumption

EOCB

Indicates end of A/D conversion. (0 = end of A/D conversion)

Each time bits 3~5 change state the A/D should be initialized by issuing a START signal, other-

wise the EOCB flag may have an undefined condition. See

²Important note for A/D initialization².

START Starts the A/D conversion. (0

®1®0= start; 0®1= Reset A/D converter and set EOCB to ²1²)

ADCR (26H) Register

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