Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

Preview PDF HTML

XIO2000 Scheda tecnica(PDF) 132 Page - Texas Instruments

Il numero della parte XIO2000
Spiegazioni elettronici  XIO2000 PCI Express to PCI Bus Translation Bridge
PDF  150 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
Logo TI - Texas Instruments

XIO2000 Scheda tecnica(HTML) 132 Page - Texas Instruments

Back Button XIO2000 Datasheet HTML 128Page - Texas Instruments XIO2000 Datasheet HTML 129Page - Texas Instruments XIO2000 Datasheet HTML 130Page - Texas Instruments XIO2000 Datasheet HTML 131Page - Texas Instruments XIO2000 Datasheet HTML 132Page - Texas Instruments XIO2000 Datasheet HTML 133Page - Texas Instruments XIO2000 Datasheet HTML 134Page - Texas Instruments XIO2000 Datasheet HTML 135Page - Texas Instruments XIO2000 Datasheet HTML 136Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 132 / 150 page
background image
Memory-Mapped TI Proprietary Register Space
120
November 2005
SCPS097B
6.23 Serial IRQ Mode Control Register
This register controls the behavior of the serial IRQ controller. This register is an alias for the serial IRQ mode
control register in the classic PCI configuration space (offset E0h, see Section 4.72). See Table 6−12 for a
complete description of the register contents.
Device control memory window register offset:
48h
Register type:
Read-only, Read/Write
Default value:
00h
BIT NUMBER
7
6
5
4
3
2
1
0
RESET STATE
0
0
0
0
0
0
0
0
Table 6−12. Serial IRQ Mode Control Register Description
BIT
FIELD NAME
ACCESS
DESCRIPTION
7:4
RSVD
R
Reserved. Returns 0h when read.
3:2†
START_WIDTH
RW
Start frame pulse width. Used to set the width of the start frame for a SERIRQ stream.
00 = 4 clocks (default)
01 = 6 clocks
10 = 8 clocks
11 = Reserved
1†
POLLMODE
RW
Poll mode. This bit selects between continuous and quiet mode.
0 = Continuous mode (default)
1 = Quiet mode
0†
DRIVEMODE
RW
Drive mode. This bit selects the behavior of the serial IRQ controller during the recovery cycle.
0 = Drive high (default)
1 = Tri-state
† These bits are reset by a PCI Express reset (PERST), a GRST, or the internally-generated power-on reset.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Scheda tecnica Scarica

Go To PDF Page


Link URL



Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   Collegamento alla scheda tecnica    |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com