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FT81X Embedded Video Engine Datasheet

Version 1.4

Document No.: BRT_000002 Clearance No.: BRT#004

Figure 4-11 Power State Transition

4.8.3.1

ACTIVE state

In ACTIVE state, the FT81x is in normal operation. The clock oscillator and PLL are functioning. The

system clock applied to the FT81x core engines is enabled.

4.8.3.2

STANDBY state

In STANDBY state, the clock oscillator and PLL remain functioning; the system clock applied to the FT81x

core engines is disabled. All register contents are retained.

4.8.3.3

SLEEP state

In SLEEP state, the clock oscillator, PLL and system clock applied to the FT81x core engines are disabled.

All register contents are retained.

4.8.3.4

POWERDOWN state

In POWERDOWN state, the clock oscillator, the PLL and the system clock applied to the FT81x core is

disabled. The core engines are powered down while the SPI interface for host commands remains

functional. All register contents are lost and reset to default when the chip is next switched on. The

internal regulator remains on.

4.8.3.5

Wake up to ACTIVE from other power states

When in the POWER DOWN state, if the device enters this state via an SPI command, then only the SPI

ACTIVE command will bring the device back to the ACTIVE state, provided PD_N pin is also high.

However, if PD_N is used instead, then making PD_N high followed by a SPI ACTIVE command will wake

up the device. Upon exiting this state, the device will perform a global reset, and will go through the

same power up sequence. All settings from SPI commands will be reset except those that pertain to pin

states during power down. The clock enable sequence mentioned in section 4.2.3 shall be executed to

properly select and enable the system clock.

POWERDOWN

SLEEP

STANDBY

VCC/VCCIO

Power ON

Toggle PD_N from high

to low

ACTIVE

Toggle PD_N from low

to high

Toggle PD_N from high

to low

Toggle PD_N from high to low or

Write command

“POWERDOWN”

Write command “STANDBY”

Write command

“SLEEP”

Write command

“ACTIVE”

Write command

“ACTIVE”

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