FT933Q-R datasheet(36/65 Pages) BRIDGETEK

36 / 65 page

FT93x Datasheet Embedded Microcontroller Datasheet

Version 1.5

Document Reference No.: BRT_000051

Clearance No.: BRT#049

4.12

I2C Interface

The FT93x series supports an I2C bus controller which is a bidirectional two wire interface. The two wires

are Serial Clock line (SCL) and Serial Data line (SDA). The interface can be programed to operate with

arbitration and clock synchronization allowing it to operate in multi-master systems. The I2C interface

supports transmission speeds up to 3.4Mb/s.

4.12.1 Features



Conforms to v2.1 and v3.0 of the I2C specification.



UM10204 I2C-bus specification and user manual Rev. 6 – 4 April 2014



Support flexible transmission speed modes:

- Standard (up to 100 kb/s)

- Fast (up to 400 kb/s)

- Fast-plus (up to 1 Mb/s)

- High-speed (up to 3.4 Mb/s)



The I2C interface can be configured to operate in Master mode or Slave mode.



Perform arbitration and clock synchronization.



Multi-master systems supported.



Support both 7-bit and 10-bit addressing modes on the I2C bus.



Support clock stretching.

4.13

UART Interface

The FT93x series contains four UART controllers with standard transmit and receive data lines. UART0

provides a full modem control handshake interface and support for 9-bit data, allowing automatic address

detection while 9-bit data mode is enabled.

UART1 is a simplified programmable serial interface with CTS and RTS flow control logic. The signals are

multiplexed with UART0 and can only be used if UART0 is used in simple mode (CTS/RTS only).

4.13.1 Features



Maximum UART data bit rate of 8 Mbit/s.



Two modes of operation : UART mode and FIFO mode



16 / 128 bytes FIFO for TX and RX in FIFO mode to reduce the interrupt frequency



Software compatible with 16450, 16550, 16750 and 16950 UARTs



MODEM control functions (CTS, RTS, DSR, DTR, RI and DCD)



Programmable automatic out-of-band Flow Control logic through Auto-RTS and Auto-CTS



Programmable automatic Flow Control logic using DTR and DSR



Programmable automatic in-band Flow Control logic using XON / XOFF characters



RS-485 buffer enable signals.



Fully programmable serial interface characteristics:

- 5-, 6-, 7-, 8- or 9-bit characters

- Even, odd, or no-parity bit generation and detection

- 1, 1.5, or 2 stop-bit generation

- Baud generation

- Detection of bad data in receive FIFO



Support Transmitter and Receiver disable capability.

4.14

Timers and Watchdog Timer

The FT93x series has four 16-bit user timers with individual prescaler and a 32-bit watchdog feature.

The watchdog timer is controlled from the main clock. The watchdog can be initialized with a 5-bit

firmware.

FT933Q-R Scheda tecnica(PDF) 36 Page - Bridgetek Pte Ltd.

FT933Q-R Scheda tecnica(HTML) 36 Page - Bridgetek Pte Ltd.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65

Scheda tecnica Scarica

Link URL