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FT93x Datasheet Embedded Microcontroller Datasheet

Version 1.5

Document Reference No.: BRT_000051

Clearance No.: BRT#049

4.19

General Purpose Input Output

The FT93x series provides up to 40 configurable Input/output pins controlled by GPIO registers. All pins

have multiple functions with special peripheral connection. Separate registers allow setting or clearing

any number of outputs simultaneously.

All GPIO pins default to inputs with pull-down resistors enabled on reset.

All GPIOs can function as an interrupt. The polarity can be either positive edge or negative edge if the

interrupt capability is enabled. In this case, the GPIO pin must be configured as a GPIO input.

4.19.1 Features



All GPIO default to inputs after reset.



Multi-function selection on GPIO pins.



Pull-up/Pull-down resistor configuration and open-drain configuration can be programmed

through the pin connect block for each GPIO pin.



Direction control of individual bits.



Supports GPIO input Schmitt trigger to help remove noise.

Supports GPIO interrupt, where each enabled GPIO interrupt can be used to wake-up the system from

power-down mode.

4.20

System Clocks

4.20.1 12MHz Oscillator

The oscillator generates a 12MHz reference frequency output to the clock multiplier PLL. The oscillator

clock source comes from either an external 12MHz crystal or a 12MHz square wave clock. The external

crystal is connected across XI/CLKIN and XIO in the configuration shown in Section 6.1. The optional

external clock input is connected to XI only.

4.20.2 Phase Locked Loop

The internal PLL takes the 12MHz clock input from the crystal oscillator. The PLL outputs the 100MHz

system clock frequency to the CPU processor and other peripheral circuits. Each peripheral has an

individual enable control signal to gate the clock source.

4.20.3 32.768 kHz RTC Oscillator

The RTC oscillator provides a clock to the RTC time counter. An external 32.768 kHz crystal or a 32.768

kHz square wave signal can be used as the clock source.

The external crystal is connected across RTC_XI/RTC_CLKIN and RTC_XIO in the configuration shown in

Section 6.2. The optional external clock input is connected to RTC_XI/RTC_CLKIN only.

4.20.4 Internal Slow Clock Oscillator

The internal slow clock oscillator provides a 5ms slow clock source to generate an interrupt for the

USB2.0 device remote wake-up feature.

A USB2.0 device with remote wake-up capability may not generate a resume signal unless the bus has

been continuously in the idle state for 5ms. For detailed description of the USB2.0 resume/suspend, refer

to USB2.0 specification Chapters 7.1.7.6 & 7.1.7.7.

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