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80KSW0004 Scheda tecnica(PDF) 1 Page - Renesas Technology Corp

Il numero della parte 80KSW0004
Spiegazioni elettronici  12-Port Serial RapidIO® Switch
PDF  48 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

80KSW0004 Scheda tecnica(HTML) 1 Page - Renesas Technology Corp

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1 Device Overview
The CPS-12, device number IDT80KSW0004, is a serial RapidIO (sRIO) switch
whose functionality is central to routing packets for distribution among DSPs,
processors, FPGAs, other switches, or any other sRIO-based devices. It may
also be used in serial RapidIO backplane switching. The CPS-12 supports serial
RapidIO packet switching (unicast, multicast, and an optional broadcast) from
any of its 12 input ports to any of its 12 output ports.
2 Features
◆ Interfaces - sRIO
–
12 bidirectional serial RapidIO (sRIO) lanes v 1.3
–
Port Speeds selectable: 3.125Gbps, 2.5Gbps, or 1.25Gbps
–
All lanes support short haul or long haul reach for each PHY speed
–
Configurable port count to up to twelve 1x ports, three 4x ports, or
combinations of 1x and 4x ports (ex. eight 1x ports and one 4x port)
–
Lanes can be configured as individual non-redundant 1x ports, as part
of a redundant 1x port, or as part of a 4x port
–
Support for two separate port rates for each quad
–
Supports standard 4 levels of priority
–
Error management support
◆ Interfaces - I2C
–
Provides I2C port for maintenance and error reporting
–
Master or Slave Operation
–
Master allows power-on configuration from external ROM
–
Master mode configuration with external image compressing and
checksum
◆ Performance
–
30 Gbps of peak switching bandwidth
–
Non-blocking data flow architecture within each sRIO priority
–
Very low latency for all packet length and load condition
–
Internal queuing buffer and retransmit buffer
–
Standard receiver based physical layer flow control
◆ Features
–
Configurable for Cut Through or Store And Forward data flow
–
Device configurable through any of sRIO ports, I2C, or JTAG
–
Packet Trace. Each port provides the ability to match the first 160 bits
of any packet against up to 4 programmable comparison values to
copy the packet to a programmable output trace port
–
Packet Filter. Each port also provides the ability to filter the packet
based on comparisons against these same 4 programmable values
mentioned above.
–
Supports up to 10 simultaneous multicast masks
–
Broadcast support
–
Port Loopback Debug Feature
–
Software assisted error recovery, supporting hot swap
–
Ports may be individually turned off to reduce power
–
PMON counters for monitor and diagnostics. Per input port and
output port counters.
–
SerDes physical diagnostic registers
–
Embedded PRBS generation and detection with programmable poly-
nomials support Bit Error Rate (BER) testing
–
0.13um technology
–
Low power dissipation
–
Full JTAG Boundary Scan Support (IEEE1149.1 & 1149.6)
–
Package: 324-ball grid array, 19mm x 19mm, 1.0mm ball pitch
3 Block Diagram
Figure 1 Block diagram
Datasheet
80KSW0004
12-Port Serial
RapidIO® Switch
M a i nt e na nc e
&
Er r o r
M a na ge m en t
C o nf i g ur a t i on
JT A G
I
2 C
sR I O
E nha nc ed
Qu a d
( u p t o 4 po r t s )
sR I O
E nha nc ed
Qu a d
( u p t o 4 po r t s )
S erial R apidIO S w itch
Ln0
Ln1
Ln2
Ln3
Ln4
Ln5
Ln6
Ln7
sR I O
E n ha nc ed
Qu a d
( u p t o 4 po r t s )
Ln8
Ln9
Ln10
Ln11


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