000-005NT026-101

Page 3 of 9

SLG5NT026

Note 1: If TVCC_RAMP > 5 V/ms and ON is asserted, Gate charging will begin after 1 ms.

Absolute Maximum Conditions

Parameter

Min.

Max.

Unit

VD or VS to GND

-0.3

40.0

V

Voltage at Logic Input pins

-0.3

6.5

V

Current at input pin

-1.0

1.0

mA

Storage temperature range

-65

150

°C

Operating temperature range

-55

125

°C

Junction temperature

--

150

°C

ESD Human Body Model

--

2000

V

ESD Machine Model

--

200

V

Electrical Characteristics (0°C to 70°C)

Symbol

Parameter

Condition/Note

Min.

Typ.

Max.

Unit

VCC

Supply Voltage

11.5

12.0

12.5

V

TVCC_RAMP VCC Ramp-up Rate

See Note 1

0.25

--

--

V/ms

Iq

Quiescent Current

VG not ramping

FET = ON

--

50

80

µA

VG not ramping

FET = OFF

--

0.1

1

µA

VD

FET Drain Voltage

SLG5NT026

1.0

--

21

V

VGS

Gate-Source Voltage

SLG5NT026

8.0

11.5

16

V

CG

FET Gate Capacitance

500

--

16000

pF

TDELAY

Ramp Delay Range

--

0.25

0.325

ms

TSLEW

FET Turn on Slew Rate

4.0V/ms config option

2.8

4.0

5.2

V/ms

2.0V/ms config option

1.4

2.0

2.6

V/ms

IDISCHARGE Internal Discharge Resistor

--

Open

--

Ω

VIH

HIGH-level input voltage

ON (200mV Hysteresis)

2.4

--

5.5

V

VIL

LOW-level Input voltage

ON (200mV Hysteresis)

--

--

0.4

V

VOH

HIGH-level output voltage

PG Open Drain

--

--

5.5

V

IOL_LOGIC Logic LOW level output

PG Sink Current (0.4V)

--

0.02

--

mA