CS5166

http://onsemi.com

24

15. Create a subground (local GND) plane preferably on

the PCB top layer and under the IC controller.

Connect all logic capacitor returns and the LGND pin

of the IC to this place. Connect the subground plane

to the main GND plane using a minimum of four (4)

vias.

COMP

PWRGD

PGND

SS

CS5166

3.0 mΩ

330 pF

LGND

1200 μF/10 V × 3

1.2 μH

IRL3103S

1.0 μF

3.3 k

0.1 μF

1000 pF

+5.0 V

MBRS120

1200 μF/10 V

× 5

Figure 37. Additional Application Diagram, +5.0 V to +2.8 V @ 14.2 A for 300 MHz Pentium II

PENTIUM II

SYSTEM

Droop Resistor

(Embedded PCB trace)

0.1 μF

IRL3103S

MBRS120

MBRS120

1.0 μF

PWRGD

510

0.1 μF