P83CE558EBBSLASHYYY datasheet(8/72 Pages) PHILIPS

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Philips Semiconductors

Preliminary specification

P83CE558/P80CE558/P89CE558

Single-chip 8-bit microcontroller

1996 Aug 06

ELECTROMAGNETIC COMPATIBILITY (EMC)

IMPROVEMENTS

Primary attention was paid on the reduction of electromagnetic

emission of the microcontroller P8xCE558.

The following features effect in reducing the electromagnetic

emission and additionally improve the electromagnetic susceptibility:

• Four supply voltage pins (V

DD) and four ground pins (VSS) with

pairs of VDD and VSS at two adjacent pins at each side of the

package.

• Separated V

DD pins for the internal logic and the port buffers

• Internal decoupling capacitance improves the EMC radiation

behavior and the EMC immunity

• External capacitors are to be located as close as possible

between pins VDD1 and VSS1, VDD2 and VSS2, VDD3 and VSS3 as

well as VDD4 and VSS4 ; ceramic chip capacitors are

recommended (100nF).

Useful in applications that require no external memory or temporarily

no external memory:

• The ALE output signal (pulses at a frequency of f

CLK/6) can be

disabled under software control (bit 5 in the SFR PCON: “RFI”); if

disabled, no ALE pulse will occur. ALE pin will be pulled down

internally, switching an external address latch to a quiet state.

The MOVX instruction will still toggle ALE (external data memory

is accessed). ALE will retain its normal HIGH value during Idle

Mode and a LOW value during Power-down mode while in the

“RFI” reduction mode. Additionally during internal access

(EA = 1) ALE will toggle normally when the address exceeds the

internal program memory size. During external access (EA = 0)

ALE will always toggle normally, whether the flag “RFI” is set or

not.

FUNCTIONAL DESCRIPTION

6.1

General

The P8xCE558 is a stand-alone high-performance microcontroller

designed for use in real time applications such as instrumentation,

industrial control, medium to high-end consumer applications and

specific automotive control applications.

In addition to the 80C51 standard functions, the device provides a

number of dedicated hardware functions for these applications.

The P8xCE558 is a control-oriented CPU with on-chip program and

data memory. It can be extended with external program memory up

to 64 Kbytes. It can also access up to 64 Kbytes of external data

memory. For systems requiring extra capability, the P8xCE558 can

be expanded using standard memories and peripherals.

The P8xCE558 has two software selectable modes of reduced

activity for further power reduction – Idle and Power-down. The Idle

Mode freezes the CPU while allowing the RAM, timers, serial ports

and interrupt system to continue functioning. The Power-down Mode

saves the RAM contents but freezes the oscillator causing all other

chip functions to be inoperative. The Power-down Mode can be

terminated by an external Reset, by the seconds interrupt and by

any one of the two external interrupts. (See description Wake-up

from Power-down Mode.)

6.2

Memory organization

The central processing unit (CPU) manipulates operands in three

memory spaces; these are the 64 Kbytes external data memory,

1024 bytes internal data memory (consisting of 256 bytes standard

RAM and 768 bytes AUX-RAM) and the 32 Kbytes internal and/or

64 Kbytes external program memory (see Figure 4).

Program Memory

64 K

DIRECT AND

INDIRECT

Internal

Data Memory

External

64 K

Internal

(EA = 1)

External

(EA = 0)

255

127

Special

Function

Registers

Overlapped

Space

External

Data Memory

32768

32767

INDIRECT

ONLY

32767

768

(ARD = 1)

(ARD = 0)

AUXILIARY

RAM

Figure 4. Memory map & address space

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