| Motore di ricerca datesheet componenti elettronici |
|
AVR32AP Scheda tecnica(PDF) 48 Page - ATMEL Corporation |
|
|
|||||||||||||||||||||||||||||
AVR32AP Scheda tecnica(HTML) 48 Page - ATMEL Corporation |
|
48 / 181 page ![]() 48 32001A–AVR32–06/06 AVR32 4. Virtual memory The AVR32 architecture uses virtual memory in order to support operating systems and large memory spaces efficiently. Virtual memory simplifies execution of multiple processes and allows allocation of privileges to different sections of the memory space. The AVR32 architecture specifies a 32-bit virtual memory space. This virtual space can be mapped to a 32-bit physical space. How this memory space is used and mapped is defined by bus controllers and memory controllers on the outside of AVR32 AP. 4.1 Memory map The memory map has six different segments, named P0 through P4, and U0. The P-segments are accessible in the privileged modes, while the U-segment is accessible in the unprivileged mode. The virtual memory map is specified below. Figure 4-1. The AVR32 virtual memory space Both the P1 and P2 segments are default segment translated to the physical address range 0x00000000 to 0x1FFFFFFF. The mapping between virtual addresses and physical addresses is therefore implemented by clearing of MSBs in the virtual address. The difference between P1 and P2 is that P1 is cached, while P2 is uncached. Because P1 and P2 are segment translated and not page translated, code for initialization of MMUs and exception vectors are located in these segments. P1, being cacheable, offers higher performance than P2. The P3 space is also by default segment translated to the physical address range 0x00000000 to 0x1FFFFFFF. By enabling and setting up the MMU, the P3 space becomes page translated. Page translation will override segment translation. The P4 space is intended for memory mapping special system resources like peripheral mod- ules. This segment is non-cacheable, non-translated. 2GB translated space Cacheable 512MB system space, non-cacheable 512MB translated space, cacheable 512MB non-translated space, non-cacheable 512MB non-translated space, cacheable Unaccessible space Access error 2GB translated space Cacheable 0x00000000 0x80000000 0xA0000000 0xC0000000 0xE0000000 0xFFFFFFFF Privileged Modes Unprivileged Mode 0x00000000 0x80000000 0xFFFFFFFF P0 P1 P2 P3 P4 U0 |
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |