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AS7225

Datasheet

• PUBLIC

DS000496

• v2-00 • 2019-Jun-28

│ 49

Figure 73:

Calibrated CCT Result Register High

Addr: 0x3E

CCT_H

Bit

Bit Name

Default

Access

Bit Description

7:0

CCT_H

Calibrated CCT data, high

byte

Figure 74:

Calibrated CCT Result Register Low

Addr: 0x3F

CCT_L

Bit

Bit Name

Default

Access

Bit Description

7:0

CCT_L

Calibrated CCT data, low

byte

10.2.23

Firmware Update Registers (Addresses 0x48:0x4B)

The firmware handles two independent images in the flash device: the first one is located on address

0x12000 and the second is on address 0x22000 available. The firmware file has a size of 56k bytes.

Figure 75:

Firmware Control Register

Addr: 0x48 (R/W)

FW_CNTRL

Bit

Bit Name

Default

Access

Bit Description

START

R/W

Set bit once to configure the

device for firmware update

STOP

Reset firmware update state

machine

BYTES_TRANSFERED

All 56k bytes are transferred

LOCK

R/W

Lock this firmware for next

start

SWITCH

Switch between both

firmware versions

BANK1

Set if bank1 is active, else

bank2

ERROR

Error occurred while firmware

update

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