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FS2302M Scheda tecnica(PDF) 41 Page - NXP Semiconductors

Il numero della parte FS2302M
Spiegazioni elettronici  Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers
PDF  230 Pages
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Produttore elettronici  NXP [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo NXP - NXP Semiconductors

FS2302M Scheda tecnica(HTML) 41 Page - NXP Semiconductors

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NXP Semiconductors
FS23
Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers
aaa-054677
Output current (A)
10-3
10-1
10-2
92
Efficiency
(%)
78
90
88
86
84
82
80
Vout = 3.3 V (2.2 MHz)
Vout = 5 V (2.2 MHz)
Vout = 3.3 V (450 kHz)
Vout = 5 V (450 kHz)
Figure 23. HVBUCK efficiency in PFM mode
13.2 HVLDO1: High-voltage linear regulator 1
13.2.1 Functional description
The HVLDO1 is a high-voltage linear-voltage regulator. The HVLDO1 is supplied from the battery. The HVLDO1
is meant to supply the MCU and other loads on the ECU, as an alternative to the HVBUCK (only one of the two
options is available by part number). The HVLDO1 is low-power capable and stays enabled in LPON mode.
General operation
The output voltage is configurable by OTP at 3.3 V or 5.0 V.
The HVLDO1 can be used without an external power device (internal PMOS only) or with an external PNP
transistor for current sharing. The ratio between the current flowing through the internal PMOS and the external
PNP, ILDO1_PNP_RATIO, is a fixed ratio of 4. The HVLDO1 maximum output DC current is 100 mA with
internal PMOS only.
Mode-specific operation
In LPON mode, only the internal PMOS can be used, and external PNP is turned OFF.
Current limitation and thermal shutdown
An overcurrent detection and a thermal shutdown are implemented on LDO1 to protect the internal pass device.
The overcurrent detection limits the current in the internal PMOS and by extension in the external PNP, if used.
The overcurrent threshold is configurable by OTP (CONF_OC_V1_OTP). An additional current limitation is
implemented on the PNP base control pin, V1_B, to protect it.
When the overcurrent is reached on the internal PMOS, the regulator stays enabled and V1OC_I flag is
generated.
In case an external PNP is used, a timeout (configurable by OTP) is implemented and disables the regulator
when an overcurrent is detected for more than TLDO1_ILIM_TO. In this case, the device transitions to Fail-safe
state and the regulator only restarts when the device restarts.
When a thermal shutdown is detected, the regulator is disabled and V1TSD_I flag is generated. Additionally, the
device can transition to Fail-safe state if configured by OTP.
FS23
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 7.0 — 16 October 2024
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