FS2302M datasheet(84/230 Pages) NXP

84 / 230 page

NXP Semiconductors

FS23

Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers

The polarity of the FCCU fault signals is configurable with FCCU12_FLT_POL bit during the INIT_FS phase.

FCCU12_FLT_POL

FCCU12 polarity

0 (default)

FCCU1 = 0 or FCCU2 = 1 level is a fault

FCCU1 = 1 or FCCU2 = 0 level is a fault

Reset condition

POR

Table 43. FCCU12 polarity configuration

When FCCU fault is detected in bi-stable protocol, the fail-safe reaction on RSTB, FS0B, or LIMP0 pins is

configurable with the FCCU1_RSTB/FS0B/LIMP0_IMPACT bits during the INIT phase.

FCCU1_RSTB/FS0B/LIMP0_IMPACT

FCCU12 impact on RSTB/FS0B/LIMP0

No effect on the pin

1 (default)

The pin RSTB/FS0B/LIMP0 is asserted

Reset condition

POR

Table 44. FCCU12 error impact configuration

19.3.2 FCCU1, FCCU2 independent monitoring

When FCCU1 and/or FCCU2 are used independently, the FCCU inputs can monitor two different and

independent error signals. These error signals can be either steady-state level signals or PWM signals.

When the error signal(s) is/are steady-state level signal(s), the polarity of each FCCU fault signal is configurable

with FCCUx_FLT_POL bits during the INIT phase.

FCCU1_FLT_POL

FCCU1 polarity

0 (default)

FCCU1 low level is a fault

FCCU1 high level is a fault

Reset condition

POR

FCCU2_FLT_POL

FCCU2 polarity

0 (default)

FCCU2 low level is a fault

FCCU2 high level is a fault

Reset condition

POR

Table 45. FCCUx polarity configuration

When the error signal(s) is/are PWM signal(s), the error state is reported when the high-level signal duration is <

FCCU12HFDET or when the low-level signal duration is > FCCU12LFDET

The fail-safe reaction on RSTB, FS0B, or LIMP0 to an FCCU fault detection is configurable with the

FCCUx_RSTB/FS0B/LIMP0_IMPACT bits during the INIT phase.

FCCU1_RSTB/FS0B/LIMP0_IMPACT

FCCU1 impact on RSTB/FS0B/LIMP0

No effect on the pin

1 (default)

The pin RSTB/FS0B/LIMP0 is asserted

Reset condition

POR

FCCU2_RSTB/FS0B/LIMP0_IMPACT

FCCU2 impact on RSTB/FS0B/LIMP0

Table 46. FCCUx error impact configuration

FS23

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 7.0 — 16 October 2024

Document feedback

84 / 230

FS2302M Scheda tecnica(PDF) 84 Page - NXP Semiconductors

FS2302M Scheda tecnica(HTML) 84 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Scheda tecnica Scarica

Link URL