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XTPSM81033VCDR Scheda tecnica(PDF) 29 Page - Texas Instruments |
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XTPSM81033VCDR Scheda tecnica(HTML) 29 Page - Texas Instruments |
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29 / 31 page ![]() EXAMPLE BOARD LAYOUT 4230162/A 11/2023 www.ti.com QFN-FCMOD - 2.00 mm max height VCD0009A PLASTIC QUAD FLAT PACK- NO LEAD LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 25X NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271) . 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. SOLDER MASK DETAILS 0.05 MAX ALL AROUND 0.05 MIN ALL AROUND METAL SOLDER MASK OPENING EXPOSED METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK EXPOSED METAL NON- SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED 1 3 (R0.05) TYP (1.15) 2X (1) 2X (0.475) 2X (0.42) 2X (0.075) 2X (0.5) 2X (0.713) 2X (1) 0.000 PKG ℄ (0.983) 18X (0.25) 2X (0.875) 2X (0.574) 2X (0.6) 2X (1.15) (0.875) (1.375) 5X (0.325) (Ø0.2) VIA TYP 2 6 7 8 9 (0.135) 2X (0.94) (0.55) (0.25) (0.36) |
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