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PIC16F628AESS Scheda tecnica(PDF) 37 Page - Microchip Technology |
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PIC16F628AESS Scheda tecnica(HTML) 37 Page - Microchip Technology |
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37 / 180 page  © 2005 Microchip Technology Inc. DS40044D-page 35 PIC16F627A/628A/648A TABLE 5-1: PORTA FUNCTIONS TABLE 5-2: SUMMARY OF REGISTERS ASSOCIATED WITH PORTA Name Function Input Type Output Type Description RA0/AN0 RA0 ST CMOS Bidirectional I/O port AN0 AN — Analog comparator input RA1/AN1 RA1 ST CMOS Bidirectional I/O port AN1 AN — Analog comparator input RA2/AN2/VREF RA2 ST CMOS Bidirectional I/O port AN2 AN — Analog comparator input VREF —AN VREF output RA3/AN3/CMP1 RA3 ST CMOS Bidirectional I/O port AN3 AN — Analog comparator input CMP1 — CMOS Comparator 1 output RA4/T0CKI/CMP2 RA4 ST OD Bidirectional I/O port. Output is open drain type. T0CKI ST — External clock input for TMR0 or comparator output CMP2 — OD Comparator 2 output RA5/MCLR/VPP RA5 ST — Input port MCLR ST — Master clear. When configured as MCLR, this pin is an active low Reset to the device. Voltage on MCLR/VPP must not exceed VDD during normal device operation. VPP HV — Programming voltage input RA6/OSC2/CLKOUT RA6 ST CMOS Bidirectional I/O port OSC2 — XTAL Oscillator crystal output. Connects to crystal resonator in Crystal Oscillator mode. CLKOUT — CMOS In RC or INTOSC mode. OSC2 pin can output CLKOUT, which has 1/4 the frequency of OSC1. RA7/OSC1/CLKIN RA7 ST CMOS Bidirectional I/O port OSC1 XTAL — Oscillator crystal input. Connects to crystal resonator in Crystal Oscillator mode. CLKIN ST — External clock source input. RC biasing pin. Legend: O = Output CMOS = CMOS Output P = Power — = Not used I = Input ST = Schmitt Trigger Input TTL = TTL Input OD = Open Drain Output AN = Analog Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR Value on All Other Resets 05h PORTA RA7 RA6 RA5(1) RA4 RA3 RA2 RA1 RA0 xxxx 0000 qqqu 0000 85h TRISA TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 1111 1111 1111 1111 1Fh CMCON C2OUT C1OUT C2INV C1INV CIS CM2 CM1 CM0 0000 0000 0000 0000 9Fh VRCON VREN VROE VRR — VR3 VR2 VR1 VR0 000- 0000 000- 0000 Legend: - = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition. Shaded cells are not used for PORTA. Note 1: MCLRE configuration bit sets RA5 functionality. |
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