PIC16F628AESS datasheet(54/180 Pages) MICROCHIP

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PIC16F627A/628A/648A

DS40044D-page 52

8.0

TIMER2 MODULE

Timer2 is an 8-bit timer with a prescaler and a

postscaler. It can be used as the PWM time base for

PWM mode of the CCP module. The TMR2 register is

readable and writable, and is cleared on any device

Reset.

The input clock (FOSC/4) has a prescale option of 1:1,

1:4 or 1:16, selected by control bits T2CKPS<1:0>

(T2CON<1:0>).

The Timer2 module has an 8-bit period register PR2.

The TMR2 register value increments from 00h until it

matches the PR2 register value and then resets to 00h

on the next increment cycle. The PR2 register is a

readable and writable register. The PR2 register is

initialized to FFh upon Reset.

The match output of Timer2 goes through a 4-bit

postscaler (which gives a 1:1 to 1:16 scaling inclusive)

to generate a Timer2 interrupt (latched in flag bit

TMR2IF, (PIR1<1>)).

Timer2 can be shut off by clearing control bit TMR2ON

(T2CON<2>) to minimize power consumption.

8.1

Timer2 Prescaler and Postscaler

The prescaler and postscaler counters are cleared

when any of the following occurs:

• a write to the TMR2 register

• a write to the T2CON register

• any device Reset (Power-on Reset, MCLR Reset,

Watchdog Timer Reset or Brown-out Reset)

The TMR2 register is not cleared when T2CON is

written.

8.2

TMR2 Output

The TMR2 output (before the postscaler) is fed to the

Synchronous Serial Port module which optionally uses

it to generate shift clock.

FIGURE 8-1:

TIMER2 BLOCK DIAGRAM

Comparator

TMR2

Sets flag

TMR2 Reg

output

Reset

Postscaler

Prescaler

PR2 Reg

FOSC/4

1:1

1:16

1:1, 1:4, 1:16

bit TMR2IF

T2CKPS<1:0>

TOUTPS<3:0>

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