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PIC16F628AESS Scheda tecnica(PDF) 41 Page - Microchip Technology |
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PIC16F628AESS Scheda tecnica(HTML) 41 Page - Microchip Technology |
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41 / 180 page ![]() © 2005 Microchip Technology Inc. DS40044D-page 39 PIC16F627A/628A/648A FIGURE 5-12: BLOCK DIAGRAM OF RB4/PGM PIN Data Latch TRIS Latch RD TRISB Q D Q CK Q D Q CK RD PORTB WR PORTB WR TRISB Schmitt Trigger PGM input LVP Data Bus RB4/PGM VDD weak pull-up P From other QD EN QD EN Set RBIF RB<7:4> pins TTL input buffer VDD VSS Note: The low-voltage programming disables the interrupt-on-change and the weak pull-ups on RB4. RBPU Q1 Q3 (Configuration Bit) |
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