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TMP93CS32F Scheda tecnica(PDF) 49 Page - Toshiba Semiconductor |
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TMP93CS32F Scheda tecnica(HTML) 49 Page - Toshiba Semiconductor |
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49 / 180 page  TMP93CS32 2004-02-10 93CS32-47 3.5.3 Port 2 (P20 to P27) Port 2 is an 8-bit general-purpose I/O port. I/O can be set on bit basis using the control register P2CR and function register P2FC. All bits of the output latch P2 is set to “1” by reset, and all bits of P2CR and P2FC are cleared to “0”. Port 2 becomes the input mode with the pull-up resistor. In addition to functioning as a general-purpose I/O port, Port 2 also shares functions as an address bus (A0 to A7) and an address bus (A16 to A23). To use Port 2 as address bus (A0 to A7 or A16 to A23), write “0” to P2 output latch and turn off the programmable pull-up resistor. Figure 3.5.4 Port 2 Direction control (on bit basis) Reset P2CR write Output latch P2 write S B Selector A P2 read Output buffer Port 2 P20 to P27 (A0 to A7/A16 to A23) Function control (on bit basis) P2FC write A16 to A23 A0 to A7 S B Selector A Programmable pull up P-ch B Selector A S |
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