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STR750FV0 Scheda tecnica(PDF) 72 Page - STMicroelectronics

Il numero della parte STR750FV0
Spiegazioni elettronici  ARM7TDMI-S??32-bit MCU with Flash, SMI, 3 std 16-bit timers, PWM timer, fast 10-bit ADC, I2C, UART, SSP, USB and CAN
PDF  84 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STR750FV0 Scheda tecnica(HTML) 72 Page - STMicroelectronics

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Electrical parameters
STR750Fxx STR751Fxx STR752Fxx STR755Fxx
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5.3.12
10-bit ADC characteristics
Subject to general operating conditions for VDDA_ADC, fPCLK, and TA unless otherwise
specified.
Table 45.
10-bit ADC characteristics
Symbol
Parameter
Conditions
Min
Typ(1)
1.
Unless otherwise specified, typical data are based on TA=25°C. They are given only as design guidelines
and are not tested.
Max
Unit
fADC
ADC clock frequency
0.4
8
MHz
VAIN
Conversion voltage range(2)
2.
Calibration is needed once after each power-up.
VSSA_ADC
VDDA_ADC
V
RAIN
External input impedance(3)(4)
3.
CPARASITIC represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus
the pad capacitance (3 pF). A high CPARASITIC value will downgrade conversion accuracy. To remedy this,
fADC should be reduced.
4.
Depending on the input signal variation (fAIN), CAIN can be increased for stabilization time and reduced to
allow the use of a larger serial resistor (RAIN). It is valid for all fADC frequencies ≤ 8 MHz.
10
k
Ω
CAIN
External capacitor on analog
input(3)(4)
6.8
pF
Ilkg
Induced input leakage current
+400 µA injected
on any pin
1
µA
-400 µA injected
on any pin
except specific
adjacent pins in
Table 46
1
µA
-400µA injected
on specific
adjacent pins in
Table 46
40
µA
CADC
Internal sample and hold
capacitor
3.5
pF
tCAL
Calibration Time
fCK_ADC=8 MHz
725.25
µs
5802
1/fADC
tCONV
Total Conversion time
(including sampling time)
fCK_ADC=8 MHz
3.75
µs
30 (11 for sampling + 19 for
Successive Approximation)
1/fADC
IADC
Sunk on
VDDA_ADC
3.7
mA



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