FS451AC datasheet(53/60 Pages) ETC2

53 / 60 page

FS450, FS451

PRELIMINARY PRODUCT DESCRIPTION

JUNE, 2000, VERSION 1.2

PRELIMINARY INFORM ATION

7.5 Interfacing to the FS450 in a Mixed Voltage Environment

As many devices designed today, the FS450 is powered by +3.3 Volts. However, 5 Volt devices are still

very common today and will continue to be used for some time in the future. To meet this interface

requirement the FS450 has 5 Volt tolerant inputs.

7.5.1 Interfacing to the SIO bus.

The SIO bus was developed previous to 3.3V logic processes. The SIO bus input voltage specification is 1.5

Volts for VIL and 3.0 Volts for VIH. The FS450 is built on a 3.3 Volt process and has 5 Volt tolerant inputs

with a VIL of 0.8 Volts and a VIH of 2.0 Volts.

For most applications this voltage difference is not an issue as the output drive low specification (VOL) of the

SIO bus and the FS450 are both 0.4 Volts. However, in heavily loaded SIO busses the output VOL is not

always preserved.

An easy way to regain the 0.7 Volt difference in the VIL specification of the FS450 and the SIO bus is to bias

the FS450’s input negative by a diode drop (D1). The diode can be biased by a long-tail resistor pair or a

current source pair. Shown below is the long-tail pair:

+12V

-12V

22K

27K

I2C

FS450

Figure 11. SIO Translation Using Long-tail Resistors

D1 = 1N4148

The long-tail pair is a simple circuit but has the disadvantage of requiring higher voltage power supplies.

Also, these supplies may have to powered up in a specific sequence so the surround circuits are not over-

voltage.

The translation circuit below requires only one 5 Volt power supply and has no special sequence

requirements. In addition, the circuit offers a high impedance load (Q1 become reverse biased) to the SIO

bus when its power supply is removed. Unfortunately, it requires more parts. In applications where

transistors are more readily available, R2 and R3 can be replaced with diode connected transistors.

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