DP83849CVSSLASHNOPB datasheet(35/100 Pages) TI2

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4.3.3 Collision Detection and SQE

When in Half Duplex, a 10BASE-T collision is detected

when the receive and transmit channels are active simulta-

neously. Collisions are reported by the COL signal on the

MII. Collisions are also reported when a jabber condition is

detected.

The COL signal remains set for the duration of the collision.

If the PHY is receiving when a collision is detected it is

reported immediately (through the COL pin).

When heartbeat is enabled, approximately 1

µs after the

transmission of each packet, a Signal Quality Error (SQE)

signal of approximately 10-bit times is generated to indi-

cate successful transmission. SQE is reported as a pulse

on the COL signal of the MII.

The SQE test is inhibited when the PHY is set in full duplex

mode. SQE can also be inhibited by setting the

HEARTBEAT_DIS bit in the 10BTSCR register.

4.3.4 Carrier Sense

Carrier Sense (CRS) may be asserted due to receive activ-

ity once valid data is detected via the squelch function.

For 10 Mb/s Half Duplex operation, CRS is asserted during

either packet transmission or reception.

For 10 Mb/s Full Duplex operation, CRS is asserted only

during receive activity.

CRS is deasserted following an end of packet.

4.3.5 Normal Link Pulse Detection/Generation

The link pulse generator produces pulses as defined in the

IEEE 802.3 10BASE-T standard. Each link pulse is nomi-

nally 100 ns in duration and transmitted every 16 ms in the

absence of transmit data.

Link pulses are used to check the integrity of the connec-

tion with the remote end. If valid link pulses are not

received, the link detector disables the 10BASE-T twisted

pair transmitter, receiver and collision detection functions.

When

the

link

integrity

function

disabled

(FORCE_LINK_10 of the 10BTSCR register), a good link is

forced and the 10BASE-T transceiver will operate regard-

less of the presence of link pulses.

4.3.6 Jabber Function

The jabber function monitors the DP83849C's output and

disables the transmitter if it attempts to transmit a packet of

longer than legal size. A jabber timer monitors the transmit-

ter and disables the transmission if the transmitter is active

for approximately 85 ms.

Once disabled by the Jabber function, the transmitter stays

disabled for the entire time that the ENDEC module's inter-

nal transmit enable is asserted. This signal has to be de-

asserted for approximately 500 ms (the “unjab” time)

before the Jabber function re-enables the transmit outputs.

The Jabber function is only relevant in 10BASE-T mode.

4.3.7 Automatic Link Polarity Detection and Correction

The DP83849C's 10BASE-T transceiver module incorpo-

rates an automatic link polarity detection circuit. When

three consecutive inverted link pulses are received, bad

polarity is reported.

A polarity reversal can be caused by a wiring error at either

end of the cable, usually at the Main Distribution Frame

(MDF) or patch panel in the wiring closet.

The bad polarity condition is latched in the 10BTSCR regis-

ter. The DP83849C's 10BASE-T transceiver module cor-

rects for this error internally and will continue to decode

received data correctly. This eliminates the need to correct

the wiring error immediately.

4.3.8 Transmit and Receive Filtering

External 10BASE-T filters are not required when using the

DP83849C, as the required signal conditioning is inte-

grated into the device.

Only isolation transformers and impedance matching resis-

tors are required for the 10BASE-T transmit and receive

interface. The internal transmit filtering ensures that all the

harmonics in the transmit signal are attenuated by at least

30 dB.

4.3.9 Transmitter

The encoder begins operation when the Transmit Enable

input (TX_EN) goes high and converts NRZ data to pre-

emphasized Manchester data for the transceiver. For the

duration of TX_EN, the serialized Transmit Data (TXD) is

encoded for the transmit-driver pair (PMD Output Pair).

TXD must be valid on the rising edge of Transmit Clock

(TX_CLK). Transmission ends when TX_EN deasserts.

The last transition is always positive; it occurs at the center

of the bit cell if the last bit is a one, or at the end of the bit

cell if the last bit is a zero.

4.3.10 Receiver

The decoder detects the end of a frame when no additional

mid-bit transitions are detected. Within one and a half bit

times after the last bit, carrier sense is de-asserted.

Receive clock stays active for five more bit times after CRS

goes low, to guarantee the receive timings of the controller.

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