SWITCH

MATRIX

CONFIGURATION

REGISTER

LOAD

REGISTER

DATA OUT

RST

DATA IN

CS

CLK

MODE

BCST

CFG

16

36

LMH6580, LMH6581

www.ti.com

SNOSAY4C – AUGUST 2007 – REVISED MAY 2013

CROSSTALK

When designing a large system such as a video router crosstalk can be a very serious problem. Extensive

testing in our lab has shown that most crosstalk is related to board layout rather than occurring in the crosspoint

switch. There are many ways to reduce board related crosstalk. Using controlled impedance lines is an important

step. Using well decoupled power and ground planes will help as well. When crosstalk does occur within the

crosspoint switch itself it is often due to signals coupling into the power supply pins. Using appropriate supply

bypassing will help to reduce this mode of coupling. Another suggestion is to place as much grounded copper as

possible between input and output signal traces. Care must be taken, though, not to influence the signal trace

impedances by placing shielding copper too closely. One other caveat to consider is that as shielding materials

come closer to the signal trace the trace needs to be smaller to keep the impedance from falling too low. Using

thin signal traces will result in unacceptable losses due to trace resistance. This effect becomes even more

pronounced at higher frequencies due to the skin effect. The skin effect reduces the effective thickness of the

trace as frequency increases. Resistive losses make crosstalk worse because as the desired signal is attenuated

with higher frequencies crosstalk increases at higher frequencies.

DIGITAL CONTROL

Figure 65. Block Diagram

Table 1. Logic Pins

Pin Name

Level Sensitive

Edge Triggered

Triggered by

CLK

Yes

CS

Yes

CLK rising edge

DATA IN

Yes

CLK falling edge

DATA OUT

Yes

CLK rising edge

CFG

Yes

MODE

Yes

RST

Yes

BCST

Yes

There are two modes for programing the LMH6580/LMH6581, Serial Mode and Addressed Mode. The

LMH6580/LMH6581 have internal control registers that store the programming states of the crosspoint switch.

The logic is two staged to allow for maximum programming flexibility. The first stage of the control logic is tied

directly to the crosspoint switching matrix. This logic consists of one register for each output that stores the on/off

state and the address of which input to connect to. These registers are not directly accessible to the user. The

second level of logic is another bank of registers identical to the first, but set up as shift registers. These registers

are accessed by the user via the serial input bus.

The LMH6580/LMH6581 is programmed via a serial input bus with the support of four other digital control pins.

The Serial bus consists of a clock pin (CLK), a serial data in pin (DIN), and a serial data out pin (DOUT). The

serial bus is gated by a chip select pin (CS). The chip select pin is active low. While the chip select pin is high all

data on the serial input pin and clock pins is ignored. When the chip select pin is brought low the internal logic is

set to begin receiving data by the first positive transition (0 to 1) of the clock signal. The chip select pin must be

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