| Motore di ricerca datesheet componenti elettronici |
|
LMH6580VS/NOPB Scheda tecnica(PDF) 24 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
LMH6580VS/NOPB Scheda tecnica(HTML) 24 Page - Texas Instruments |
|
24 / 32 page ![]() CLK DIN CS_N I0 DOUT T1 T2 T3 T4 T6 T7 T8 T9 TS TH T5 T10 0 1 0 1 0 1 0 1 CFG 1 0 MODE 0 1 HIGH IMPEDANCE I2 I1 TS A0 A1 T TS LMH6580, LMH6581 SNOSAY4C – AUGUST 2007 – REVISED MAY 2013 www.ti.com Figure 67. Timing Diagram for Addressed Mode Table 4. Addressed Mode Word Format(1) Output Address Input Address TRI-STATE LSB MSB LSB MSB 1 = TRI-STATE 0 = On 0 1 2 3 4 5 (1) Bit 0 is first bit clocked into device. DAISY CHAIN OPTION IN SERIAL MODE The LMH6580/LMH6581 supports daisy chaining of the serial data stream between multiple chips. This feature is available only in the Serial Programming Mode. To use this feature serial data is clocked into the first chip DIN pin, and the next chip DIN pin is connected to the DOUT pin of the first chip. Both chips may share a chip select signal, or the second chip can be enabled separately. When the chip select pin goes low on both chips a double length word is clocked into the first chip. As the first word is clocking into the first chip the second chip is receiving the data that was originally in the shift register of the first chip (invalid data). When a full 16 bits have been clocked into the first chip the next clock cycle begins moving the first frame of the new configuration data into the second chip. With a full 32 clock cycles both chips have valid data and the chip select pin of both chips should be brought high to prevent the data from overshooting. A configure pulse will activate the new configuration on both chips simultaneously, or each chip can be configured separately. The mode, chip select, configure and clock pins of both chips can be tied together and driven from the same sources. SPECIAL CONTROL PINS The LMH6580/LMH6581 have two special control pins that function independent of the serial control bus. One of these pins is the reset (RST) pin. The RST pin is active high meaning that at logic 1 level the chip is configured with all outputs disabled and in a high impedance state. The RST pin programs all the registers with input address 0 and all the outputs are turned off. In this configuration the device draws only 11mA. The RST pin can be used as a shutdown function to reduce power consumption. The other special control pin is the broadcast (BCST) pin. The BCST pin is also active high and sets all the outputs to the on state connected to input 0. This is sometimes referred to as broadcast mode, where input 0 is broadcast to all eight outputs. 24 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMH6580 LMH6581 |
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |