FN8724 datasheet(29/34 Pages) RENESAS

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ISL98608IIH

FN8724 Rev.2.01

Page 29 of 33

Dec 7, 2021

EXAMPLE FOR VBST REGULATOR

Consider the following parameters in the steady state VLED

boost regulator operating in CCM mode.

VIN =2.5V

VO =5.3V

IO = 0.100A

fSW =1.45MHz

Efficiency = 80%

L = 2.2µH

Substituting previous parameters in Equation 9 gives us:

IPk =0.472A

The VBST regulator can be configured to either use a fixed peak

current or to automatically select the optimal peak current

setting. The automatic mode is designed to dynamically adjust

the peak current to maintain boost output voltage ripple at a

relatively fixed value across input voltage, while improving

efficiency at low input voltages.

In order to avoid the inductor core saturation, the saturation

current of the inductor selected should be higher than the greater

of the peak inductor current (for CCM) and the peak current in

PFM mode and current limit of the regulators. It is recommended

to use an inductor that has saturation current rating higher than

current limit of the boost regulator.

Auto PFM mode provides maximum efficiency using 2.2µH for

the VBST regulator. L = 2.2µH is the optimal value for the VBST

regulator.

Table 3 shows the recommended inductors for the VBST boost

regulator.

Output Capacitor

The output capacitor supplies current to the load during transient

conditions and reduces the ripple voltage at the output. Output

ripple voltage consists of two components:

1. The voltage drop due to the inductor ripple current flowing

through the ESR of the output capacitor.

2. Charging and discharging of the output capacitor.

For low ESR ceramic capacitors, the output ripple is dominated

by the charging and discharging of the output capacitor. The

voltage rating of the output capacitor should be greater than the

maximum output voltage.

The effective capacitance at the nominal output voltage should

be ≥2.2µF for VBST and VP regulators, and ≥4.4µF for VN. It is

recommended to use a 10µF X5R 10V or equivalent ceramic

output capacitor for both VBST and VP outputs to provide a

minimum of 2.2µF effective capacitance. For the VN output, it is

recommended to use one or two 10µF X5R 10V or equivalent

ceramic output capacitors. Using two VN output capacitors

results in <50mV peak-to-peak output voltage ripple with input

voltages from 2.5V to 5V.

Table 4 shows the recommended capacitors for various

regulators in ISL98608IIH.

Note, capacitors have a voltage coefficient. The effective

capacitance will reduce (derate) as the operating voltage/bias

increases. Always refer to the manufacturer's derating

information to determine effective capacitance for the operating

conditions.

General Layout Guidelines

When designing the printed circuit board (PCB) layout for the

ISL98608IIH, it is very important to understand the power

requirements of the system. Some general best practices should

be adhered to in order to create an optimal PCB layout:

1. Careful consideration should be taken with any traces

carrying AC signals. AC current loops should be kept as short

and tight as possible. The current loop generates a magnetic

field, which can couple to another conductor, inducing

unwanted voltage. Components should be placed such that

current flows through them in a straight line as much as

possible. This will help reduce size of loops and reduce the

EMI from the PCB.

2. If trace lengths are long, the resistance of the trace increases

and can cause some reduction in IC efficiency and can also

cause system instability. Traces carrying power should be

made wide and short.

3. In discontinuous conduction mode, the direction of the

current is interrupted every few cycles. This may result in large

di/dt (transient load current). When injected in the ground

plane the current may cause voltage drops, which can

interfere with sensitive circuitry. The analog ground and

power ground of the IC should be connected very close to the

IC to mitigate this issue.

4. One plane/layer in the PCB is recommended to be a

dedicated ground plane. A large area of metal will have lower

resistance, which reduces the return current impedance.

TABLE 3. RECOMMENDED INDUCTORS FOR VBST REGULATOR

INDUCTOR PART

NUMBER

INDUCTANCE

(µH)

DCR

(mΩ)

ISAT

(A)

FOOTPRINT

SIZE

VLF302510MT-2R2M

(TDK)

2.2

1.23

3025

DFE252012C

(Toko)

2.2

2.00

2520

TFM201610G-2R2M

(TDK)

2.2

150

1.20

2016

TABLE 4. RECOMMENDED OUTPUT CAPACITORS

CAPACITOR PART

NUMBER

VALUE

(µF)

SIZE

QUANTITY

GRM155R61A106ME11

(Murata)

0402

x5: CIN, CVBST, CVP,

CVN, CCP

x1: CVN (x2 for

minimum ripple)

GRM188R61C475KAAJ

(Murata)

4.7

0603

x5: CIN, CVBST, CVP,

CVN, CCP

x1: CVN (x2 for

minimum ripple)

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