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LMKDB1108FS85RKPR Scheda tecnica(PDF) 9 Page - Texas Instruments

Il numero della parte LMKDB1108FS85RKPR
Spiegazioni elettronici  LMKDB11xx PCIe Gen 1 to Gen 7 Ultra Low Jitter LP-HCSL Clock Buffer Family
PDF  133 Pages
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Produttore elettronici  TI2 [Texas Instruments]
Homepage  https://www.ti.com
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LMKDB1108FS85RKPR Scheda tecnica(HTML) 9 Page - Texas Instruments

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Table 5-2. LMKDB1113 Pin Functions (continued)
PIN
TYPE(1)
DESCRIPTION
NAME(2) (3)
NO.
CLK0_P
12
O
LP-HCSL differential clock output 0. No connect if unused.
CLK0_N
13
O
CLK1_P
18
O
LP-HCSL differential clock output 1. No connect if unused.
CLK1_N
19
O
CLK2_P
20
O
LP-HCSL differential clock output 2. No connect if unused.
CLK2_N
21
O
CLK3_P
23
O
LP-HCSL differential clock output 3. No connect if unused.
CLK3_N
24
O
CLK4_P
26
O
LP-HCSL differential clock output 4. No connect if unused.
CLK4_N
27
O
CLK5_P
31
O
LP-HCSL differential clock output 5. No connect if unused.
CLK5_N
32
O
CLK6_P
34
O
LP-HCSL differential clock output 6. No connect if unused.
CLK6_N
35
O
CLK7_P
37
O
LP-HCSL differential clock output 7. No connect if unused.
CLK7_N
38
O
CLK8_P
39
O
LP-HCSL differential clock output 8. No connect if unused.
CLK8_N
40
O
CLK9_P
43
O
LP-HCSL differential clock output 9. No connect if unused.
CLK9_N
44
O
CLK10_P
47
O
LP-HCSL differential clock output 10. No connect if unused.
CLK10_N
48
O
CLK11_P
50
O
LP-HCSL differential clock output 11. No connect if unused.
CLK11_N
51
O
CLK12_P
53
O
LP-HCSL differential clock output 12. No connect if unused.
CLK12_N
54
O
POWER
VDDA
7
P
Analog power supply. Additional power supply filtering is recommended. See Section 10.3
for details.
VDDCLK
11, 16, 30, 41,
49,
P
Output power supply
Thermal Pad (GND)
Pad
G
Device Ground, Thermal pad.
LOGIC CONTROLS / STATUS
^OE0#
10
I
Active low input to control CLK0. Internal pullup resistor.
0 = Output Active, 1 = Output Inactive
^/vOE1#/
SHFT_LD#
17
I
Active low input to control CLK1 or SBI active low shift register load pin. SBI_EN pin
controls function of this pin. OE mode with internal pullup: 0 = Active output, 1 = Inactive
output.
Side-Band Mode with internal pulldown: SBI latch register input.
^OE2#
22
I
Active low input to control CLK2. Internal pullup resistor.
0 = Output Active, 1 = Output Inactive
^OE3#
25
I
Active low input to control CLK3. Internal pullup resistor.
0 = Output Active, 1 = Output Inactive
^OE4#
28
I
Active low input to control CLK4. Internal pullup resistor.
0 = Output Active, 1 = Output Inactive
www.ti.com
LMKDB1102, LMKDB1104, LMKDB1104FS, LMKDB1108, LMKDB1108FS
LMKDB1112, LMKDB1120, LMKDB1120FS
SNAS855G – NOVEMBER 2023 – REVISED MAY 2026
Copyright © 2026 Texas Instruments Incorporated
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Product Folder Links: LMKDB1102 LMKDB1104 LMKDB1104FS LMKDB1108 LMKDB1108FS LMKDB1112 LMKDB1120 LMKDB1120FS



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