DIO7B104

Version 1.0, Jun 2024

www.dioo.com

© 2024 DIOO MICROCIRCUITS CO., LTD.

11

From port A to

port B

2.5 V

2.5 V

32

pF

5 V

37

pF

3.3 V

3.3 V to 5 V

35

pF

CL = 0, f = 10 MHz,

tr = tf = 4 ns,

OE = GND,

(outputs disabled)

1.08 V

5 V

0.01

pF

1.8 V

0.01

pF

1.5 V

1.8 V

0.01

pF

1.8 V

1.8 V

0.01

pF

2.5 V

2.5 V

0.01

pF

5 V

0.01

pF

3.3 V

3.3 V to 5 V

0.01

pF

CpdB

Equivalent

capacitance for

dynamic power

dissipation.

From port B to

port A

CL = 0, f = 10 MHz,

tr = tf = 4 ns, OE = VCCA,

(outputs enabled)

1.08 V

5 V

30

pF

1.8 V

19

pF

1.5 V

1.8 V

18

pF

1.8 V

1.8 V

15

pF

2.5 V

2.5 V

20

pF

5 V

25

pF

3.3 V

3.3 V to 5 V

21

pF

CL = 0, f = 10 MHz,

tr = tf = 4 ns,

OE = GND,

(outputs disabled)

1.08 V

5 V

0.01

pF

1.8 V

0.01

pF

1.5 V

1.8 V

0.01

pF

1.8 V

1.8 V

0.01

pF

2.5 V

2.5 V

0.01

pF

5 V

0.01

pF

3.3 V

3.3 V to 5 V

0.01

pF

Note:

(1) Cpd parameter is the capacitance used to determine the no-load dynamic power dissipation per logic function for CMOS devices

as per the formula: PD = Cpd × (VCC)2 + ICC × VCC.

(2) Specifications subject to change without notice.